完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lai, WK | en_US |
dc.contributor.author | Liu, HW | en_US |
dc.contributor.author | Juang, MH | en_US |
dc.contributor.author | Cheng, HC | en_US |
dc.date.accessioned | 2014-12-08T15:46:27Z | - |
dc.date.available | 2014-12-08T15:46:27Z | - |
dc.date.issued | 1999-07-01 | en_US |
dc.identifier.issn | 0021-4922 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1143/JJAP.38.3993 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/31262 | - |
dc.description.abstract | The cobalt polycide gate formed by implanting BF2+ ions into the bilayered CoSi/a-Si films and the subsequent rapid thermal anneal has been studied. The resulting gate oxide integrity is characterized with respect to various silicide thicknesses and implantation energies. Significant degradation in gate oxide integrity and Aat-band voltage shift were found with increasing silicide thickness and annealing temperature, especially for the thicker CoSi2 films, which is attributable to severe boron penetration. Although a thinner silicide can achieve excellent gate dielectric reliability, it will lead to poor high-temperature thermal stability. Moreover, shallower implantation depth and lower annealing temperature, which sustain less boron penetration, would cause the poly-Si gate depletion effects. Therefore, appropriate conditions, which comprise the CoSi2 thickness, the implantation energy, and the annealing temperature, should be employed to optimize the device performance while retaining the thin dielectric reliability. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | cobalt | en_US |
dc.subject | boron | en_US |
dc.subject | penetration | en_US |
dc.subject | MOS | en_US |
dc.subject | RTA | en_US |
dc.subject | integrity | en_US |
dc.title | Effects of rapid thermal annealing on cobalt silicided p(+) poly-Si gates fabricated by BF2+ implantation into bilayered CoSi/a-Si films | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1143/JJAP.38.3993 | en_US |
dc.identifier.journal | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS | en_US |
dc.citation.volume | 38 | en_US |
dc.citation.issue | 7A | en_US |
dc.citation.spage | 3993 | en_US |
dc.citation.epage | 3996 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000083278000006 | - |
dc.citation.woscount | 0 | - |
顯示於類別: | 期刊論文 |