標題: A cost effective BIST second-order Sigma-A-modulator
作者: Hong, Hao-Chiao
Liang, Sheng-Chuan
Song, Hong-Chin
電控工程研究所
Institute of Electrical and Control Engineering
公開日期: 2008
摘要: This paper demonstrates a cost effective built-in-self-test (BIST) E-A modulator prototype. The BIST prototype is composed of a design-for-digital-testability second-order E-A modulator chip and a FPGA which implements the digital BIST functions. The BIST system is based on the modified control sine wave fitting (MCSWF) procedure. Different from the con- ventional analysis method using Fast Fourier Transform (FFT), this implementation requires neither any parallel multiplier nor complex CPU/DSP and bulky memory. Measurement results show that the BIST prototype gives a signal-to-noise-and-distortion ratio (SNDR) result of 74.3 dB which is within 0.3 dB comparing with the FFT counterpart. The proposed BIST implementation achieves the advantages of compact hardware, high accuracy, and the flexibility of adjusting the stimuli which are important features for BIST applications.
URI: http://hdl.handle.net/11536/3152
ISBN: 978-1-4244-2276-0
期刊: 2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS
起始頁: 314
結束頁: 319
顯示於類別:會議論文