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dc.contributor.authorSheng, Duoen_US
dc.contributor.authorChung, Ching-Cheen_US
dc.contributor.authorLee, Chen-Yien_US
dc.date.accessioned2014-12-08T15:47:32Z-
dc.date.available2014-12-08T15:47:32Z-
dc.date.issued2008en_US
dc.identifier.isbn978-1-4244-2341-5en_US
dc.identifier.urihttp://hdl.handle.net/11536/31843-
dc.description.abstractIn this paper, a programmable all-digital spread spectrum clock generator (ADSSCG) suitable for System-On-Chip (SoC) applications with ultra-low-power capability is presented. Based on the timing constraint of system, the programmable ADSSCG can provide the suitable frequency spread ratio to obtain the optimal combination of timing deviation and EMI reduction for system applications. Besides, the proposed ADSSCG employs an ultra-low-power digitally controlled oscillator (DCO) to save overall power consumption to 560 mu W (@400MHz) and the peak EMI power reduction is large than 25dB. In addition, the proposed ADSSCG can be implemented only with standard cells; as a result, the area can be saved without any passive component, and making it easily portable to different processes and very suitable for SoC applications.en_US
dc.language.isoen_USen_US
dc.titleAn All Digital Spread Spectrum Clock Generator with Programmable Spread Ratio for SoC Applicationsen_US
dc.typeArticleen_US
dc.identifier.journal2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4en_US
dc.citation.spage850en_US
dc.citation.epage853en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000268007100211-
Appears in Collections:Conferences Paper