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dc.contributor.authorWu, CYen_US
dc.contributor.authorHou, HMen_US
dc.date.accessioned2014-12-08T15:47:36Z-
dc.date.available2014-12-08T15:47:36Z-
dc.date.issued1998-10-01en_US
dc.identifier.issn0038-1101en_US
dc.identifier.urihttp://hdl.handle.net/11536/31857-
dc.description.abstractAn efficient method is presented to model the transient characteristics of distributed resistor-capacitor of ULSI multilevel interconnections on complex topography, in which the reformulation of the boundary-element method (BEM) associated with the Padi-via-Lanczos (PVL) algorithm can avoid the redundant works on both volume mesh and transient analysis associated with the finite-difference method. An adaptive multilayer closed-form spatial Green's function for BEM is developed to examine the voltage and current responses of the multilevel conductor system by using the boundary-element method of integral formulation, in which arbitrary triangular elements on the surface of conductors are used to efficiently calculate the free-charge distributions of complex structure based on actual topography/processes. Applying the Galerkin principle over boundary elements, all of the surface integrals of charge distribution have been discretized and evaluated analytically for constant element. To improve the timing-analysis efficiency of the finite-difference method, the dominant poles are obtained by introducing the Pade-via-Lanczos (PVL) algorithm for model-order reduction. Hence, it is easy to calculate the transient characteristics of both parallel conductors and complicated configurations such as crossing lines, corners, contacts, multilayers and their combinations. Therefore, a simple and more general method is proposed for solving the combinations of complex structures based on actual topography/processes and arbitrary geometric configurations of multilevel interconnection lines in order to link with the present CAD tools. (C) 1998 Published by Elsevier Science Ltd. All rights reserved.en_US
dc.language.isoen_USen_US
dc.titleAn efficient transient modeling for 3-D multilevel interconnections in a stratified dielectric mediumen_US
dc.typeArticleen_US
dc.identifier.journalSOLID-STATE ELECTRONICSen_US
dc.citation.volume42en_US
dc.citation.issue10en_US
dc.citation.spage1881en_US
dc.citation.epage1891en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000076523100017-
dc.citation.woscount0-
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