標題: | Impact of Highly Compressive Interlayer-Dielectric-SiN(x) Stressing Layer on 1/f Noise and Reliability of SiGe-Channel pMOSFETs |
作者: | Chen, Yu-Ting Chen, Kun-Ming Liao, Wen-Shiang Huang, Guo-Wei Huang, Fon-Shan 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-十二月-2010 |
摘要: | The 1/f noise and reliability of SiGe-channel pMOSFETs with a highly compressive contact-etching stop-layer (CESL) interlayer-dielectric-SiN(x) stressing layer have been studied in this letter. The SiGe-channel devices with a highly compressive CESL layer have higher drain current and lower 1/f noise than the conventional SiGe-channel and bulk-Si devices. However, the device reliability is degraded while integrating with the highly compressive CESL layer. By examining the effective oxide-trap densities under hot-carrier instability stress, we find that the incorporated hydrogen in gate oxide during CESL layer deposition may play an important role on the 1/f noise and device reliability. |
URI: | http://dx.doi.org/10.1109/LED.2010.2073438 http://hdl.handle.net/11536/31877 |
ISSN: | 0741-3106 |
DOI: | 10.1109/LED.2010.2073438 |
期刊: | IEEE ELECTRON DEVICE LETTERS |
Volume: | 31 |
Issue: | 12 |
起始頁: | 1368 |
結束頁: | 1370 |
顯示於類別: | 期刊論文 |