標題: A NEW OXIDATION-RESISTANT COSI2 PROCESS FOR SELF-ALIGNED SILICIDATION (SALICIDE) TECHNOLOGY
作者: LOU, YS
WU, CY
CHENG, HC
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-一月-1993
摘要: This paper presents a new oxidation-resistant and self-aligned CoSi2 process using amorphous-Si (a-Si)/Co bilayer metallization. It is shown that, even in an environment without introducing any flowing inert gas, the detrimental reaction between Co metal and ambient impurities, e.g. O2 and H2O, can be completely impeded by a covered thin a-Si layer during the thermal silicidation cycle. Moreover, despite a capped a-Si layer over Co film, the satisfactory self-aligned silicidation properties can be retained if the initial silicidation temperature is kept below 500-degrees-C in N2 ambient. Furthermore, the dependences of both oxidation-resistant and self-aligned silicidation properties on the thicknesses of a-Si and Co films are studied in detail. Based on experimental analysis, the allowed process window for the a-Si film thickness can be determined and is shown to increase with increasing the Co film thickness. An empirical process rule is experimentally obtained to determine the optimal thickness relation between a-Si and Co films for the a-Si/Co bilayer process. Thus, a simple and practical self-aligned CoSi2 process with extremely high immunity to ambient impurities is proposed for SALICIDE applications.
URI: http://hdl.handle.net/11536/3188
ISSN: 0038-1101
期刊: SOLID-STATE ELECTRONICS
Volume: 36
Issue: 1
起始頁: 75
結束頁: 83
顯示於類別:期刊論文