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dc.contributor.authorChang, RIen_US
dc.contributor.authorHsiao, PYen_US
dc.date.accessioned2014-12-08T15:01:29Z-
dc.date.available2014-12-08T15:01:29Z-
dc.date.issued1997-09-01en_US
dc.identifier.issn1045-9227en_US
dc.identifier.urihttp://dx.doi.org/10.1109/72.623207en_US
dc.identifier.urihttp://hdl.handle.net/11536/320-
dc.description.abstractIn this paper, a three-layer force-directed self-organizing map is designed to resolve the circuit placement problem with arbitrarily shaped rectilinear modules. The proposed neural model with an additional hidden layer can easily model a rectilinear module by a set of hidden neurons to correspond the partitioned rectangles. With the collective computing from hidden neurons, these rectilinear modules can correctly interact with each other and finally converge to a good placement result. In this paper, multiple contradictory criteria are accounted simultaneously during the placement process, in which, both the wire length and the module overlap are reduced. The proposed model has been successfully exploited to solve the time consuming rectilinear module placement problem, The placement results of real rectilinear test examples have been presented, which demonstrate that the proposed method is better than the simulated annealing approach in the total wire length, Furthermore, on the average, the central processing unit (CPU) time for the proposed method running on a sequential machine is 15 times faster than that required by the simulated annealing method, The appropriate parameter values which yield good solutions are also investigated.en_US
dc.language.isoen_USen_US
dc.subjectforce-directed placement methoden_US
dc.subjectmolecule modelen_US
dc.subjectquery-based learningen_US
dc.subjectrectilinear circuiten_US
dc.subjectthree-layer self-organizing mapsen_US
dc.titleVLSI circuit placement with rectilinear modules using three-layer force-directed self-organizing mapsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/72.623207en_US
dc.identifier.journalIEEE TRANSACTIONS ON NEURAL NETWORKSen_US
dc.citation.volume8en_US
dc.citation.issue5en_US
dc.citation.spage1049en_US
dc.citation.epage1064en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
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