完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Liang, C. -P. | en_US |
dc.contributor.author | Huang, T. -J. | en_US |
dc.contributor.author | Rao, P. -Z. | en_US |
dc.contributor.author | Chung, S. -J. | en_US |
dc.date.accessioned | 2014-12-08T15:48:15Z | - |
dc.date.available | 2014-12-08T15:48:15Z | - |
dc.date.issued | 2010-09-30 | en_US |
dc.identifier.issn | 0013-5194 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1049/el.2010.1278 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/32169 | - |
dc.description.abstract | A low-power 5.25 GHz voltage-controlled oscillator ( VCO) with phase-noise improvement is designed in a 0.18 mu m CMOS 1P6M process. Owing to the use of a larger value of parallel capacitor, an additional harmonic-suppressed capacitor, and an appropriate bulk bias voltage of transistor, a good figure of merit of - 190 dBc/Hz can be achieved without extra chip area and CMOS process steps. The fabricated VCO operates from 5.12 to 5.36 GHz with a core power consumption of 1.9 mW and active chip area of 0.15 mm(2). The measured phase noise at 1 MHz offset is about - 119 dBc/Hz. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Low-power VCO with phase-noise improvement in 0.18 mu m CMOS technology | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1049/el.2010.1278 | en_US |
dc.identifier.journal | ELECTRONICS LETTERS | en_US |
dc.citation.volume | 46 | en_US |
dc.citation.issue | 20 | en_US |
dc.citation.spage | 1385 | en_US |
dc.citation.epage | 1387 | en_US |
dc.contributor.department | 傳播研究所 | zh_TW |
dc.contributor.department | Institute of Communication Studies | en_US |
dc.identifier.wosnumber | WOS:000282285800020 | - |
dc.citation.woscount | 1 | - |
顯示於類別: | 期刊論文 |