Performance of Dual-Channel Gate-All-Around Polysilicon Nanowire Thin-film Transistor

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Huang, Po-Chun	en_US
dc.contributor.author	Sheu, Tzu-Shiun	en_US
dc.contributor.author	Chen, Chen-Chia	en_US
dc.contributor.author	Chen, Lu-An	en_US
dc.contributor.author	Sheu, Jeng-Tzong	en_US
dc.date.accessioned	2014-12-08T15:48:16Z	-
dc.date.available	2014-12-08T15:48:16Z	-
dc.date.issued	2008	en_US
dc.identifier.isbn	978-1-4244-2071-1	en_US
dc.identifier.uri	http://hdl.handle.net/11536/32176	-
dc.language.iso	en_US	en_US
dc.title	Performance of Dual-Channel Gate-All-Around Polysilicon Nanowire Thin-film Transistor	en_US
dc.type	Article	en_US
dc.identifier.journal	2008 IEEE SILICON NANOELECTRONICS WORKSHOP	en_US
dc.citation.spage	151	en_US
dc.citation.epage	152	en_US
dc.contributor.department	材料科學與工程學系奈米科技碩博班	zh_TW
dc.contributor.department	Graduate Program of Nanotechnology , Department of Materials Science and Engineering	en_US
dc.identifier.wosnumber	WOS:000279102800077	-
顯示於類別：	會議論文