完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Liao, C. C. | en_US |
dc.contributor.author | Chin, Albert | en_US |
dc.contributor.author | Su, N. C. | en_US |
dc.contributor.author | Li, M. -F. | en_US |
dc.contributor.author | Wang, S. J. | en_US |
dc.date.accessioned | 2014-12-08T15:48:30Z | - |
dc.date.available | 2014-12-08T15:48:30Z | - |
dc.date.issued | 2008-01-01 | en_US |
dc.identifier.isbn | 978-1-4244-1802-2 | en_US |
dc.identifier.issn | en_US | |
dc.identifier.uri | http://dx.doi.org/10.1109/VLSIT.2008.4588614 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/32298 | - |
dc.description.abstract | We report low V-t Al/TaN/[Ir3Si-HfSi2-x]/HfLaON CMOS using simple laser annealing/reflection with self-aligned and gate-first process compatible with current VLSI. At 1.05 nm EOT, good phi(m-eff) of 5.04 and 4.24 eV, low V-t of -0.16 and 0.13 V, high mobility of 85 and 209 cm(2)/Vs, and small 85 degrees C BTI <= 40 mV (10 MV/cm, 1 hr) are measured for p- and n-MOS. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Low V-t gate-first Al/TaN/[Ir3Si-HfSi2-x]/HfLaON CMOS using simple laser annealing/reflection | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/VLSIT.2008.4588614 | en_US |
dc.identifier.journal | 2008 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | en_US |
dc.citation.volume | en_US | |
dc.citation.issue | en_US | |
dc.citation.spage | 190 | en_US |
dc.citation.epage | 191 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000259116200072 | - |
顯示於類別: | 會議論文 |