標題: | Specification, validation, and verification of time-critical systems |
作者: | Shieh, SP Chen, JN 資訊工程學系 Department of Computer Science |
關鍵字: | time-critical systems;specification;validation;verification;reachability analysis;the space explosion problem;path approach |
公開日期: | 15-May-1998 |
摘要: | In this paper, we propose a new formalism, named the Timed Communicating Finite State Machine (Timed CFSM), for specifying and verifying time-critical systems. Timed CFSM preserves the advantages of CFSM, such as the ability to express communication, synchronization and concurrency in computer systems. A given time-dependent specification can be formalized as a Timed CFSM, from which the reachability graph is constructed to verify the correctness of the specification. To cope with the space explosion problem from which all reachability analysis methods suffer, we propose a space reduction algorithm to meet the space constraint of the verification environment. (C) 1998 Elsevier Science B.V. |
URI: | http://hdl.handle.net/11536/32623 |
ISSN: | 0140-3664 |
期刊: | COMPUTER COMMUNICATIONS |
Volume: | 21 |
Issue: | 5 |
起始頁: | 460 |
結束頁: | 469 |
Appears in Collections: | Articles |
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