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dc.contributor.authorChiou, BSen_US
dc.contributor.authorWu, KLen_US
dc.date.accessioned2014-12-08T15:49:13Z-
dc.date.available2014-12-08T15:49:13Z-
dc.date.issued1998-04-01en_US
dc.identifier.issn0957-4522en_US
dc.identifier.urihttp://hdl.handle.net/11536/32704-
dc.description.abstractIndium tin oxide (ITO) films were deposited onto p-type Si wafers with radio frequency (r.f.) magnetron sputtering. The effect of the silicon surface treatment with reactive ion etching (RIE) on the current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the ITO/Si junction are investigated. When the Si substrate is etched by RIE prior to the deposition of ITO film, the I-V characteristics of the ITO/p-Si junction transfer from an ohmic contact for the unetched-Si to a rectifying contact for the etched Si. In addition, the barrier height, ideality factor, and series resistance increase with increasing etching power. This is attributed to the net positive ion charge and defects on the damaged surface. Thermal annealing can eliminate the damage caused by RIE. The I-V curves of ITO/etched p-Si become more ohmic as samples are annealed in N-2 at 300 degrees C. Secondary ion mass spectroscopy (SIMS) depth profiles indicate that some impurity defects migrate and/or disappear after post-etching annealing. (C) 1998 Chapman & Hall.en_US
dc.language.isoen_USen_US
dc.titleEffect of reactive ion etching and post-etching annealing on the electrical characteristics of indium-tin oxide silicon junctionsen_US
dc.typeArticleen_US
dc.identifier.journalJOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICSen_US
dc.citation.volume9en_US
dc.citation.issue2en_US
dc.citation.spage151en_US
dc.citation.epage157en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000072708700011-
dc.citation.woscount4-
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