標題: | On the design of selective coefficient DCT module |
作者: | Lu, CY Wen, KA 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | DCT;selective coefficient;2-D DCT |
公開日期: | 1-四月-1998 |
摘要: | In this transactions letter, an innovative selective coefficient discrete cosine transform (SCDCT) architecture is proposed which is designed for selective coefficient computation and straightforward row-column computation, Having these features, the selective coefficient DCT core will fit for various area/speed requirements, It can save the transposition delay to simplify the computation how of two-dimensional (2-D) DCT and, in view of circuit implementation, SCDCT is multiply-free and thus area/speed efficient. |
URI: | http://dx.doi.org/10.1109/76.664099 http://hdl.handle.net/11536/32707 |
ISSN: | 1051-8215 |
DOI: | 10.1109/76.664099 |
期刊: | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY |
Volume: | 8 |
Issue: | 2 |
起始頁: | 143 |
結束頁: | 146 |
顯示於類別: | 期刊論文 |