標題: CHARACTERIZATION OF SILICIDED SHALLOW N+P JUNCTIONS FORMED BY P+ IMPLANTATION INTO THIN TI FILMS ON SI SUBSTRATES
作者: JUANG, MH
CHENG, HC
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-十月-1992
摘要: High-quality silicided shallow n+p junctions have been fabricated by P+ implantation into thin Ti films on Si substrates and by moderate implant conditions as well as subsequent high-temperature rapid thermal annealing (RTA) followed by low-temperature conventional furnace annealing (CFA). RTA minimizes the diffusion of knock-on Ti but greatly reduces the drive-in efficiency because of its short annealing time. Driving the dopants out of silicides via long-time annealing was associated with the crystallinity of silicides. The junctions formed by this scheme with respect to various implant and anneal conditions have been characterized. In addition, the distribution profile of Ti penetration was correlated with the effective generation life time obtained from the reverse I-V curves.
URI: http://hdl.handle.net/11536/3271
ISSN: 0038-1101
期刊: SOLID-STATE ELECTRONICS
Volume: 35
Issue: 10
起始頁: 1535
結束頁: 1542
顯示於類別:期刊論文