標題: A 30-MHZ TRELLIS CODEC CHIP FOR PARTIAL-RESPONSE CHANNELS
作者: SHUNG, CB
SIEGEL, PH
THAPAR, HK
KARABED, R
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: CODEC CHIP;TRELLIS CODE;PARTIAL RESPONSE
公開日期: 1-十二月-1991
摘要: We present a rate 8/10 matched-spectral-null (MSN) trellis codec chip which can increase noise tolerance in partial-response channels applicable to digital magnetic recording. The Viterbi detector in this codec features an area-efficient pipelined architecture and a modulo metric normalization technique. The chip was implemented in a 1.2-mu-m CMOS process with a die size of 22 mm2. It offers a 12-Mb/s data rate when operating at 30 MHz. Experimental results verified the predicted coding gain of 2.8 dB relative to the uncoded system at a bit-error rate of 10(-7).
URI: http://dx.doi.org/10.1109/4.104192
http://hdl.handle.net/11536/3605
ISSN: 0018-9200
DOI: 10.1109/4.104192
期刊: IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume: 26
Issue: 12
起始頁: 1981
結束頁: 1987
顯示於類別:期刊論文


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