應用於數位電視和WIMAX 之低相位雜訊三角積分調變頻率合成器

Abstract

本論文提出低相位雜訊三角積分之分數型頻率合成器，兩種不同架構的分數型頻率合成器被實現，這些電路皆應用於數位電視以及WIMAX行動通訊上。

在射頻系統上，頻率合成器的設計仍然是最具有挑戰性議題之ㄧ。因為它必須要達到非常嚴格要求，例如:穩定時間(setting time)、相位雜訊、參考愧入 (reference feedthrough)，又被稱作參考邊頻 (reference spur) ，．．等。在設計頻率合成器中，有幾個取捨(trade-off)會出現。首先，穩定時間長短主要取決於迴路頻寬 (loop bandwidth) 大小。同時因為考量迴路的穩定性，迴路頻寬會被限制在大約1/10的參考頻率。接著，壓控振盪器的相位雜訊只有在小於迴路頻寬時才會被回授的迴路所降低。最後，我們需要縮小迴路頻寬來降低參考邊頻。為了解決這些取捨，我們設計出幾種新的架構採取電流匹配以及動態式電容取樣，隨機充電等概念來降低參考邊頻的鎖相迴路。

量測結果:再DTV系統下可調整輸出頻寬為2110~870兆赫茲，相位雜訊為-81.62分貝/赫茲 @1赫茲，再WIMAX系統下可調整輸出頻寬為2890~2100兆赫茲，相位雜訊為-81.67分貝/赫茲 @2.5赫茲，寄生雜頻較主頻低69.78分貝，49.49分貝。

This thesis focuses on low-noise sigma-delta fractional-N synthesizers. Two fractional-N synthesizers are presented. These circuits are targeted for DTV and WIMAX applications.

Synthesizer design still remains one of the most challenge issues in RF system because it must meet very stringent requirements such as: setting time phase noise, reference feedthrough, etc. Several trade-offs exist in the synthesizer design. First, the settling time is largely determined by the loop bandwidth which is limited to approximately 1/10 of the reference frequency for the loop stability consideration. Second, the phase noise of the oscillator is reduced by the feedback loop only within the loop bandwidth. Finally, in order to suppress the reference spur, a small loop bandwidth is required. To solve all these trade-offs, we have proposed several new architectures adopting consists of current match, dynamically switched capacitors, and random charge to achieve low reference spur PLL. The measurement results show that: the synthesizer output frequency for DTV system is tunable between 2110~870MHz, and phase noise is -81.62dBc/Hz @1-MHz offset. The output frequency for WIMAX system is tunable between 2890~2100MHz, and phase noise is -81.67dBc/Hz@2.5-MHz offset with spurious tones -69.78dBc, and -43.49dBc.