完整後設資料紀錄
DC 欄位語言
dc.contributor.author張孝瑜en_US
dc.contributor.authorHsiao-Yu Changen_US
dc.contributor.author崔秉鉞en_US
dc.contributor.authorBing-Yue Tsuien_US
dc.date.accessioned2014-12-12T01:13:32Z-
dc.date.available2014-12-12T01:13:32Z-
dc.date.issued2007en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009511511en_US
dc.identifier.urihttp://hdl.handle.net/11536/38054-
dc.description.abstract本論文使用多次旋塗碳管的方式製作碳管網絡,並探討其應用於薄膜電晶體和非揮發性記憶體之性能。在薄膜電晶體方面,實驗結果發現通道長度小於碳管長度時,元件導通電流大但開關比例(ID>10μA@VD= -0.1V,on/off ratio<10),並且無法藉由電流崩潰法提升開關比例;至於通道長度較大的元件,又因碳管塗佈時受到表面高低差的影響導致碳管分佈不均勻,因此雖然有較大的開關比例,但導通電流較小(ID<1μA@VD= -0.1V,on/off ratio>10)。利用Gm,max換算載子遷移率,可得到載子遷移率為3.6cm2/Vs,因為碳管的覆蓋率約只有1%。換算覆蓋率後的載子遷移率約360cm2/Vs,和接近單根碳管所得到的8723 cm 2/Vs仍有一段差距,推測原因為碳管網絡中 金屬性和半導體性碳管交錯形成的蕭基位障,變溫量測也驗證碳管網絡電晶體的導通機制是由金屬性碳管與半導體性碳管間的蕭基位障主導。 多根碳管交錯的碳管網絡電晶體有兩個主要缺點,第一是金屬性碳管和半導體性碳管的交錯造成蕭基位障,使得元件導通電流降低、開關速度變慢;第二是電流應力崩潰金屬性碳管的方法不適用於交錯的碳管網絡,使得元件的開關比例無法進一步提升。提高碳管密度、使碳管平行排列、提高半導體性碳管比例,是進一步提升性能碳管網絡電晶體的重點。此外,碳管網絡薄膜的電阻係數約為62.3μΩ•cm,銅膜隨著厚度降低至11.5nm,電阻係數增至32.34μΩ•cm,當厚度降至10nm以下時,僅能形成不連續的島狀(islands)分佈。因此,如能提高金屬性碳管比例,碳管網絡薄膜可望作為超薄導電層的應用。 論文第二部份將碳管網絡應用在非揮發性記憶體的電荷儲存層,使用相同的碳管網絡製作方式,利用實驗對照組與碳管分佈的狀態可驗證記憶體特性確為碳管所造成。記憶體特性量測,發現閘極+8V對元件有等效正電荷的寫入效應,寫入電壓越大與寫入時間越長,臨界電壓飄移的量越大,並且有明顯飽和的現象。抹除所需負偏壓達-22V,另外,升溫對於元件亦有抹除效果。 實驗量測結果發現寫入抹除現象和傳統快閃記憶體不同,本論文檢視電洞注入、極性分子轉動、金屬離子移動、分子與碳管結合等可能的機制,初步可排除極性分子轉動與碳管粉末中金屬雜質的影響,而電洞的注入與抹除亦存在不合理的情形,因此較傾向特殊分子和碳管結合後形成等效正電荷的儲存,明確的機制仍需進一步的探討。電荷保存時間以及耐用性能都不如現有的非揮發性記憶體,但其特殊的操作與記憶模式,值得進一步研究,並可望透過製程改良,提升性能。zh_TW
dc.description.abstractIn this thesis, carbon nanotube (CNT) network prepared by coating method were applied to thin-film transistors (TFTs) and non-volatile memory. It is observed that with channel length shorter than the CNT, the on-current of TFTs is higher than 10μA at VD= -0.1V but the on/off ratio is smaller than 10. And, the on/off ratio can not be further raised by electrical breakdown method. For TFTs with longer channel length, the on/off ratio becomes larger but the on-current becomes smaller (ID<1μA@VD= -0.1V, on/off ratio>10). This tradeoff is attributed to the non-uniform distributions of the CNT by coating method. The mobility extracted from Gm,max and the layout channel width is 3.6cm2/Vs. Since the surface coverage of CNT is ~1%, the actual mobility of the CNT TFT is 360 cm2/Vs. This value is still smaller than the mobility of individual CNT transistor (8723 cm 2/Vs) due the Schottky barriers (SBs) formation from the junctions between semiconducting tubes and metallic tubes. The on-current transport mechanism is identified to be dominated by the Schottky emission. There are two major drawbacks for the CNT network TFT from the experimental results. At first, the SBs between semiconducting tubes and metallic tubes limit the on current and therefore the switching speed. Second, the electric breakdown method is not suitable for CNT network so that the on/off ratio can not be further improved. Increasing surface coverage, placing CNT in parallel, raising the semiconducting CNT percentage are the key factors to improve the CNT TFTs performance. On the other hand, the resistivity of the CNT network is estimated to be 62.3μΩ•cm. The resistivity of a 11.5nm thick Cu film increases from the bulk value of 1.7μΩ•cm to 32.34μΩ•cm. It is hard to form continuous Cu films thinner than 10nm. Therefore, CNT network can be applied as excellent ultra-thin conducting layer if the metallic CNT percentage can be increased. The CNT network can be applied as the charge-trapping layer (CTL) for non-volatile memory. The same CNT network fabrication method is used. Comparing with control sample without CNT network, we can verify that the memory effect is due to the existence of CNT. From the measurement of memory characteristics, Vg = 8V result in effective positive charge storage. The lager programming voltage or the longer programming time makes the more threshold voltage shift. And the threshold voltage shift would saturate. Erasing voltage is much higher than the programming voltage (-22V versus 8V) and the positive charge can be removed by raising temperature to higher than 250C. The observed P/E phenomena are quite different from those of the traditional flash memories. Four possible mechanisms including hole injection, dipole rotation, mobile ion, and electric field induced molecular interaction are examined. Both the rotation of polar molecules and the metallic impurities are excluded. Hole injection mechanism also relies on some unreasonable assumptions. The electric field induced molecular interaction seems more feasible although the detailed mechanism is not clear at this moment and need much more efforts to clarify. The retention and endurance characteristics of the CNT memory are not as good as those of the traditional flash memories. Because of the novel operation mechanism, it is worthy to improve the performance by optimizing process conditions in the future.en_US
dc.language.isozh_TWen_US
dc.subject奈米碳管zh_TW
dc.subject薄膜電晶體zh_TW
dc.subject非揮發性記憶體zh_TW
dc.subjectcarbon nanotubeen_US
dc.subjectthin film transistoren_US
dc.subjectnonvolatile memoryen_US
dc.title單壁奈米碳管網絡應用於薄膜電晶體與非揮發性記憶體之特性研究zh_TW
dc.titleA Study on Single-Walled Carbon Nanotube Network for Thin-Film Transistor and Nonvolatile Memory Applicationsen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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