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dc.contributor.author鄧貴宇en_US
dc.contributor.authorGui-Yu Dengen_US
dc.contributor.author張俊彥en_US
dc.contributor.authorChun-Yen Changen_US
dc.date.accessioned2014-12-12T01:13:44Z-
dc.date.available2014-12-12T01:13:44Z-
dc.date.issued2007en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009511551en_US
dc.identifier.urihttp://hdl.handle.net/11536/38088-
dc.description.abstract非揮發性記憶體(NVM)目前在元件尺寸持續微縮下的需求為高密度記憶單元、低功率損耗、快速讀寫操作、以及良好的可靠度(Reliability)。傳統浮動閘極(floating gate)記憶體在操作過程中如果穿隧氧化層產生漏電路徑會造成所有儲存電荷流失回到矽基板,所以在資料保存時間(Retention)和耐操度(Endurance)的考量下,很難去微縮穿隧氧化層的厚度。非揮發性奈米點記憶體被提出希望可取代傳統浮動閘極記憶體,由於奈米點可視為電荷儲存層中彼此分離的儲存點,可以有效改善小尺寸記憶體元件多次操作下的資料儲存能力。 在本論文中,我們用一個簡單的製程方法來形成錳矽氧化物(MnSiOx)奈米點,並應用於非揮發性記憶體。室溫下,在氬氣(Ar) 的環境中濺鍍(sputtering) Mn0.2Si0.8 薄膜,後續在氧氣環境中快速熱退火使得錳矽氧化物奈米點聚積。我們研究發現此製程方法可形成均勻且高密度的奈米點。進一步利用X光光電能譜(XPS)鑑別錳矽氧化物奈米點組成以及能隙與能帶圖建立。並藉由電流密度與溫度關係萃取錳矽氧化物的缺陷深度。最後我們製作雙層錳矽化物奈米點記憶體結構並探討其特性,並得到比單層奈米點較好的電荷儲存能力和保存能力。zh_TW
dc.description.abstractCurrent requirements of nonvolatile memory (NVM) are the high density cells, low-power consumption, high-speed operation and good reliability for the scaling down devices. However, all of the charges stored in the floating gate will leak into the substrate if the tunnel oxide has a leakage path in the conventional NVM during endurance test. Therefore, the tunnel oxide thickness is difficult to scale down in terms of charge retention and endurance characteristics. The nonvolatile nanocrystal memories are one of promising candidates to substitute for conventional floating gate memory, because the discrete storage nodes as the charge storage media have been effectively improve data retention under endurance test for the scaling down device. In this thesis, an ease and low temperature fabrication technique of MnSiOx nanocrystals was demonstrated for the application of nonvolatile memory. The nonvolatile memory structure was fabricated by sputtering Mn0.2Si0.8 in an Ar environment at room temperature, and then RTO process was performed to cause the self-assembly of MnSiOx nanocrystal in the charge trapping layer. In addition, the uniform and high density (~1012 cm-2) nanocrystal can be fabricated simply in our study. XPS were adopted to identify the MnSiOx NCs. The band gap of MnSiOx, VBO and CBO between the MnSiOx films and Si substrates are also obtained by XPS measurements. The analysis of the temperature dependence of the current density in MnSiOx gate stacks is allowed to estimate the energy levels responsible for the leakage current in these layers. We also proposed a formation of Mn-Si-O nanocrystals by sputtering Mn0.2Si0.8 in the Ar/O2 environment at room temperature, and then RTA process in the N2 ambiance was performed to cause the self-assembly of MnSiOx nanocrystal in the charge trapping layer. Sputter in O2 ambiance can avoid over oxidation and degradation by conventional RTO process. A superior memory characteristic in term of retention characteristic is found. It’s considered that less oxygen concentration cause deeper trap level and much trap density due to oxygen vacancy. Multi-layer MnSiOx nanocrystal memory structure is also fabricated and discussed. Multi-layer nanocrystals have better charge storage and retention over single-layer nanocrystals.en_US
dc.language.isoen_USen_US
dc.subject非揮發性記憶體zh_TW
dc.subject奈米點zh_TW
dc.subjectnonvolatile memoryen_US
dc.subjectnanocrystalen_US
dc.subjectSONOSen_US
dc.title錳矽氧化物奈米點在非揮發性記憶體應用之研究zh_TW
dc.titleStudy on the Application of Mn-Si-O Nanocrystal for Nonvolatile Memoryen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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