完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 郭建鴻 | en_US |
dc.contributor.author | Jian-Hung Kuo | en_US |
dc.contributor.author | 莊紹勳 | en_US |
dc.contributor.author | Steve S. Chung | en_US |
dc.date.accessioned | 2014-12-12T01:13:48Z | - |
dc.date.available | 2014-12-12T01:13:48Z | - |
dc.date.issued | 2007 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT009511570 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/38103 | - |
dc.description.abstract | 就一個具有較佳資料保存特性的先進快閃式記憶體元件設計來說,氮化矽記憶體 (SONOS memory) 將是未來非揮發性記憶體元件的主流,它相較於快閃記憶體 (flash) ,有著較簡單的結構、簡單的製程,而且可以比傳統浮動閘結構快閃記憶體有更佳的微縮能力 (scalability) 。現今的快閃式記憶體,因可攜式資訊系統的蓬勃發展,對低電壓操作、低耗電、以及快速等的要求愈趨殷切。傳統上多利用通道熱電子 (CHEI: Channel Hot Electron Injection) 的寫入機制來達到其中的要求,但由於離子碰撞產生的電子與電洞的交互作用可能導致穿隧氧化層的可靠性問題出現。在本論文中,將針對SONOS元件探討一種新的電子的注入方式,深入探討其物理機制以及可靠性議題。 對於SONOS記憶體元件的微縮來說,其一大優點就是每細胞二位元(2-bit-per-cell) 的操作。2-bit-per-cell獨特的儲存結構是利用區域性的電荷注入,與不具傳導特性的電荷儲存材料。首先,我們發展出一個低電壓操作的順偏壓電子注入方式— FBEI (Forward Bias induced Electron Injection) ,相較於發表過的操作方式,該方法為目前最低的電壓,且有足夠大的電壓視窗 (operation window) 。實驗結果比較,FBEI具有與CHEI局部儲存電荷的相似行為。經由製作電荷密度儲存的輪廓中發現,FBEI的儲存位置較CHEI更為靠近汲極端 (drain) 。此外由於具有較佳的電荷保存 (data retention) 特性,使FBEI亦成為2-bit操作的新選擇。 | zh_TW |
dc.description.abstract | For the design of advanced flash memories with better data retention characteristics, SONOS (Silicon Oxide Nitride Oxide Silicon) will become the main stream of nonvolatile memory products because of its simplicity in structure and scalable by comparing with conventional floating gate cells. The flash memory today, due to the vigorous development of the portable information system, the requirements for low voltage operation, low power consumption, and high speed are becoming increasingly important. By using the conventional programming scheme of channel hot electron injection, the interaction of the generated electron and hole pairs could cause the reliability issue for the tunnel oxide. This thesis will be focused on a novel programming method for SONOS applications, in which its physical mechanism and reliability issues will be demonstrated. For the scaling of SONOS memory, two-bit-per-cell operation has been one of the merits for SONOS devices. The unique feature of two-bit-per-cell storage is owing to the localized charge injection and the non-conducting property of charge storage material. First, we developed a low voltage operation scheme, FBEI (Forward Bias induced Electron Injection). Comparing to those reported schemes, this FBEI scheme has features of low voltage and sufficient large operation window. We found that the FBEI and CHEI have a similar characteristic to store charge locally verified from our experiment. Moreover, the stored charge for FBEI is closer to the drain than CHEI from the profiling of the stored charge density distribution. In addition, a better data retention property also made FBEI to become a new candidate for 2-bit operation. The characteristics of endurance and data retention test have also been compared. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 快閃式記憶體 | zh_TW |
dc.subject | 二位元 | zh_TW |
dc.subject | 三階 | zh_TW |
dc.subject | 電荷分布 | zh_TW |
dc.subject | SONOS | en_US |
dc.subject | Two-Bit | en_US |
dc.subject | Three Level Charge Pumping | en_US |
dc.subject | Charge Profile | en_US |
dc.title | 二位元SONOS快閃式記憶體之物理機制與可靠性探討 | zh_TW |
dc.title | Investigation of the Mechanism and Reliability in a Two-Bit SONOS Flash Memory | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
顯示於類別: | 畢業論文 |