具高效能斜率補償器及與輸入電源無關之負載電流識別機制的電流模式直流/直流降壓電源轉換器

Abstract

在消費性電子產品中，尤以手持式產品的應用上，需求越來越廣泛。擁有高效能與小型化的電源轉換器日趨重要。為了有效使用有限的電池能量，電源管理系統為非常重要的元件。故本文提出一個切換式穩壓器在斜率補償上的應用單元，以期在模式切換時有最好的效能表現。 論文中，降壓式轉換器適當的操作於脈波寬度調變模式(PWM)以及脈波頻率調變模式(PFM)，分別應用於重電流負載及輕電流負載。然而在電流控制模式下，當工作周期大於二分之一的全周期時，會發生所謂的次諧波震盪導致系統不穩定。所以在傳統控制中，加入補償斜率來克服次諧波震盪。然而此一傳統斜率補償電路會造成誤差放大器的輸出電壓(VC)隨供應電源(VIN)而改變，產生控制上的困擾。 利用本文所提出的高效能斜率補償器(HSC)，可達到誤差放大器的輸出電壓(VC)與供應電源(VIN)互為獨利因子，僅與負載電流成正相關。此外為防止電源轉換器有逆向電流的產生，本文使用零電流偵測器(ZCD)來偵測逆向電流的發生，以提高系統效能表現。所以在傳統控制上，是偵測逆向電流保護電路的輸出訊號來判定切入脈波頻率調變模式的時機。然而傳統零電流偵測器的輸入訊號對抗雜訊能力較差，無法操作於高頻切換電路。所以本文利用已提出的誤差放大器的輸出電壓(VC)當成切換依據，達到克服雜訊以及負載電流識別機制的功能。 本論文所提出的內容，非以逆向電流保護電路的輸出訊號當作判別依據，是以誤差訊號放大器的輸出端訊號(VC)來判斷。藉由誤差訊號放大器的輸出電壓(VC)隨負載電流變化而不隨供應電源改變的特性，來達到高效率的模式轉換。 本論文根據不同負載情況適當地切換這於此兩種模式間，整體系統效率可維持百分之八十以上。本電路架構以世界先進股份有限公司點三五微米製程來實現，其模擬結果與效能值亦包含在文中。

Today’s portable and battery powered products such as cellular phones, personal digital assistant (PDA), tablet PC, etc are increasingly demanded more and more. The system’s operation time is an important issue to enhance the worth of electronic devices. Therefore, the power management systems provide solutions to overcome the above problems. In switching converters especially in current mode systems, there is a slope compensation circuit to prevent the occurrence of sub-harmonic oscillation that caused the system unstable. Designers proposed a sawtooth ramp adding to the sensed inductor current to eliminate the sub-harmonic oscillation. But conventional sawtooth ramp makes the output voltage of error amplifier (VC) unpredictable as the supply voltage changes. A high-efficiency slope compensator (HSC) is presented to achieve power reduction in current-mode control and provide input-independent load condition identification for mode switch in hybrid PWM/PFM system. That is, according to load condition, an adaptive mode transition can be decided by the HSC circuit and not varied by the variation of input voltage. Therefore, for a hybrid PWM/PFM system, the power conversion efficiency can be kept high over a wide load range. Besides, the pulse-ramp generator prevents the current-mode DC-DC converter from having the sub-harmonic oscillation problem and reduces power dissipation of the slope compensator. Simulation results show that the mode transition is accurately decided at the optimum point without being affected by the variation of input voltage. The power conversion efficiency is improved about 5% in PWM/PFM transition region. The proposed technique is based on current-mode dc-dc buck controller. The circuit implementation is fabricated by VIS 0.35-□m CMOS technology and the overall efficiency is larger than 80% at all load conditions.