低功率低電壓微機電電容式麥克風前置放大器

Abstract

本研究主要設計微機電(MEMS)電容式麥克風之前置放大電路，由於可攜式低電壓運作之電子產品日益茁壯，因此，本論文將著重於手機應用之微機電(MEMS)電容式麥克風在低電壓低功率操作下之前置放大器。設計之初，將以直流電壓訊號與交流電壓訊號虛擬成電容式麥克風之動作。所設計完成之電路以此虛擬之直流電壓以及交流電壓加以模擬。本文針對微機電(MEMS)電容式麥克風前置放大器設計與模擬，其整體設計流程從原理了解與文獻參考比較、電路設計、H-SPICE軟體模擬修正、晶片設計、實體佈局與下線及晶片量測結果，在本論文內均詳述。本論文之讀取電路包含了兩個主要電路，一為中心中點自偏之電容-電壓轉換器電路，另一個為放大器。其中，放大器關係到本論文之訊號的特性，剛開始設計了一般二階級運算放大器，雖然此放大器可以順利的放大訊號，但是在固定的放大倍率下，不同輸入擺幅與頻率，所造成輸出與相對應理想倍率下之訊號不同。因此，此設計之二階級運算放大器有非線性的放大倍率與較低的輸出擺幅。所以，進而改用對稱式軌對軌運算放大器，提高了電路的線性度與輸出擺幅。本研究之電路將以台灣積體電路公司0.35um (2P4M, 3.3V/5V) 製程完成晶片製作。輸出電壓範圍大約在正負電壓源範圍，總電路功率消耗約200uW。另外增添設計低通濾波器以及高通濾波器，進而減少高頻雜訊以及濾除掉輸入直流偏壓。

This study is intended to design a readout circuit to extract the output signal of a capacitive-type MEMS microphone. Due to the rising demand for portable battery-operated electronic devices, a low-power preamplifier is designed in this study for a capacitive-type microphone to meet the demands on cell phone applications. The design starts with modeling the electro-mechanical behavior of a biased capacitive-type microphone using the combination of ac and dc voltages sources. This is aimed to enable co-simulation of the microphone together with the readout circuit design later. The designed readout circuit consists of two main subcircuits, which are responsible for the functions in two different stages. One is a newly-designed self-bias circuit in the structure of a capacitance-to-voltage converter at the first stage, while another is a low-voltage low-power two-stage or rail-to-rail MOS operational amplifier at the second stage. The readout circuit designed to operate capacitive-type microphone is in principle a buffering circuit, which acting as a transimpedance to convert the very high microphone output impedance. However, the output signal of a capacitance-to-voltage converter is normally small and it may cause substantial noise in the output signals. Therefore, a preamplifier is designed and applied to amplify the signal to an acceptable level for the convenience of ensuing signal processing. The proposed circuit is implemented by using the technology of TSMC 0.35um Mixed-Signal MODE (2P4M, 3.3V/5V) POLYCIDE. The supply voltage is fixed at low voltage (3V), the total power dissipation is merely 200uW. Experiments are finally conducted to validate the performance of the designed readout circuit from 20 to 20k Hz with appropriate add-on high- and low-pass filters.