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dc.contributor.authorHSIAO, PYen_US
dc.contributor.authorTSAI, CCen_US
dc.date.accessioned2014-12-08T15:05:23Z-
dc.date.available2014-12-08T15:05:23Z-
dc.date.issued1991-01-01en_US
dc.identifier.issn0143-7062en_US
dc.identifier.urihttp://hdl.handle.net/11536/3914-
dc.description.abstractA new application of artificial intelligence techniques in automatic compaction design for a VLSI mask layout is presented. To overcome the shortcomings of iterative search through a large problem space within a working memory, and therefore, to speed up the runtime of compaction, a set of rule-based region query operations and knowledge-based techniques for the plane sweep method are presented in this system. Experimental results have explored the possibility of using expert system technology to automate the compaction process by reasoning about the layout design, applying the sophisticated expert rules to its knowledge base.en_US
dc.language.isoen_USen_US
dc.subjectCOMPUTER-AIDED DESIGNen_US
dc.subjectVERY LARGE SCALE INTEGRATIONen_US
dc.titleEXPERT COMPACTOR - A KNOWLEDGE-BASED APPLICATION IN VLSI LAYOUT COMPACTIONen_US
dc.typeArticleen_US
dc.identifier.journalIEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUESen_US
dc.citation.volume138en_US
dc.citation.issue1en_US
dc.citation.spage13en_US
dc.citation.epage20en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:A1991EU14300002-
dc.citation.woscount0-
Appears in Collections:Articles


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