Title: | 應用於多輸入多輸出通道之低複雜度多模式訊號偵測演算法與超大型積體電路實現 Low-Complexity Multi-Mode Signal Detection Algorithm and VLSI Implementation for Multiple-Input Multiple-Output Channels |
Authors: | 吳廸優 Di-You Wu 范倫達 Lan-Da Van 資訊科學與工程研究所 |
Keywords: | 多輸入多輸出;訊號偵測;排序式QR分解;超大型積體電路;MIMO;Signal Detection;Sorted QR Decomposition;VLSI;V-BLAST |
Issue Date: | 2007 |
Abstract: | 在本論文中,我們使用平行消除干擾、群組干擾壓縮及遞迴之技術提出一個應用於多輸入多輸出通道之廣義平行群組遞迴(GPGI)偵測框架,並提出一個低複雜度多模式演算法。所提出之偵測框架可調整三項參數與三種子演算法以達到效能與複雜度的取捨。所提出的框架平台不只包含傳統的BODF偵測、群組偵測、遞迴偵測與B-Chase偵測演算法,並且衍生出一種新的低運算複雜度且多模式之GPGI-T1偵測演算法。在使用8個傳送天線與8個接收天線及輸入不編碼之16-QAM符號下,與BODF偵測演算法相比,在最低複雜度的情況下,GPGI-T1演算法能夠減少33.9%的複雜度,並且在效能上還勝過10 dB。在另一個情況下,GPGI-T1演算法與B-Chase演算法相比,能夠降低36.8%的複雜度而只損失0.4 dB。最後,根據所提出之GPGI-T1演算法,我們使用TSMC 0.18 um製程實作出一多模式之多輸入多輸出訊號偵測器,可使用在傳送天線與接收天線各為二或四的情況下,支援QPSK、16-QAM、64-QAM之調變。並且,在五個特定應用晶片中,此實作有較好的功率效益。 In this thesis, we use parallel interference cancellation (PIC), group interference suppression (GIS) and iteration techniques to construct a generalized parallel grouped-iterative (GPGI) detection framework and one new low-complexity algorithm for multiple-input multiple-output (MIMO) channels. The proposed detection framework provides three parameters and three sub-algorithms to configure a range of tradeoffs between performance and complexity. The presented framework not only covers the conventional BLAST-ordered decision feedback (BODF), grouped, iterative, and B-Chase detection algorithms, but also derives the GPGI-Type 1 (GPGI-T1) detection algorithm with low computational complexity. In (8,8) system with uncoded 16-QAM inputs, one instance of the GPGI-T1 algorithm not only substantially reduces the complexity by 33.9% but also outperforms the BLAST-ordered decision feedback algorithm by 10 dB. Another instance of the GPGI-T1 algorithm can save complexity by 36.8% at the penalty of 0.4 dB loss compared with the B-Chase detector. Last, according to the proposed GPGI-T1 algorithm, we implement a multi-mode MIMO signal detector in TSMC 0.18 um CMOS process. The resulting implementation can work in (2,2) or (4,4) system, and supports QPSK, 16-QAM, and 64-QAM modulation modes. Importantly, the resulting MIMO detection implementation possesses the comparable power efficiency among five ASIC designs. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT009555611 http://hdl.handle.net/11536/39563 |
Appears in Collections: | Thesis |
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