標題: | 地面數位影像廣播系統之通道估測法於PACDSP平台實作設計 Implementation of Channel Estimation Methods for DVB-T System on PACDSP Platform |
作者: | 郭兼豪 Kuo, Chien-Hao 陳紹基 Chen, Sau-Gee 電機學院IC設計產業專班 |
關鍵字: | 通道估測;數位訊號處理器;Channel Estimation;DSP;PACDSP;DVB-T |
公開日期: | 2008 |
摘要: | PACDSP為一個由工業技術研究院系統晶片科技中心(ITRI STC)所自行研究開發出的數位訊號處理器,它特殊的架構及指令可以支援高平行度的運算需求,適用於各種多媒體裝置,並且能有效的完成演算法的實現。在本論文中,我們將地面數位影像廣播系統的通道估測方法實作在PACDSP平台上,首先,通道估測大致上可以分成兩種:非時變通道估測法和時變通道估測法,在非時變的通道我們研究了幾種常見的內插法,而在時變通道部分我們提出了一個有效且複雜度低的通道估測方法。至於PACDSP實作設計的部份,我們將以上提到的通道估測法實作在PACDSP平台上,並分析其執行時間以及記憶體,因為PACDSP在進行通道估測所需的除法運算時需要相當多的執行時間,所以我們針對PACDSP提出了一些有效的方法來減少除法運算的執行時間。最後,我們並提出對於在PACDSP設計上的建議。 PACDSP is a digital signal processor developed by ITRI STC. Its special architecture and instructions can support highly parallel operations. It is suitable for various kinds of multimedia applications and can implement the associated multimedia algorithms efficiently. In this thesis, we implement the channel estimation methods for DVB-T system on PACDSP platform. Channel estimation can be roughly divided into two kinds: time-invariant channel estimation methods and time-variant channel estimation methods. We investigate several interpolation methods for time-invariant channel estimation and propose an effective channel estimation method with low complexity. We implement the channel estimation methods on PACDSP platform. We also analyze the execution cycle numbers and the memory requirement of the channel estimation methods. Since PACDSP spends a lot of execution cycles on division operation required by channel estimation, we propose some effective methods to reduce the execution cycles for division operations on PACDSP. Finally, we propose some design suggestions for PACDSP. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT009595506 http://hdl.handle.net/11536/40130 |
顯示於類別: | 畢業論文 |