具二區段式溫度計編碼架構的12位元500百萬赫芝電流式互補式金氧半導體數位類比轉換器

Abstract

本論文設計實現一個12位元500MHz的數位類比轉換器, 選取電流式架構讓數位-類比轉換器輸出級的設計上不需要設計額外放大器來做電流電壓轉換，降低功率消耗並符合高速與高解析度的應用。

電流式數位類比轉換器設計需考量因製程造成電流源不匹配效應，對電流源電晶體大小進行最佳化後來降低對靜態特性DNL與INL上的不理想性。進而針對因電路造成的輸出突波的非理想性加以改善所以加入二元順序判別電路的機制讓數位-類比轉換器電路一次只打開一個電流源, 降低突波效應, 得到較佳的動態特性表現, 並配合選擇順序最佳化與四象限對稱佈局安排來降低階梯誤差與系統誤差。

電流式數位類比轉換器由4 + 8位元用二區段式溫度計編碼架構組成。採用TSMC 0.18 µm 1P6M mixed□signal CMOS 製程來實現，整體晶片面積為1.8648mm2。

The thesis presents a 12bit 500MHz digital-to-analog-converter (DAC) by using a current-steering architecture. The output of the DAC does not require an extra output buffer to convert I to V so as to achieve lower power consumption, and to suit for high speed and high resolution application. The current steering DAC needs to deal with the issue of the current source mismatch due to process fabrication. Therefore current sources are first optimized by transistor size to reduce no-ideal integral nonlinearity (INL) and differential nonlinearity (DNL) effects on static performance. To reduce non-ideal glitch effects, binary order decision circuits are implemented in the current-steering DAC to allow only one current source opened every time for getting better performance. Combined with optimized switching sequence and symmetric current source array arranged as a two-dimensional common centroid floor plan, gradient effects and symmetric errors can be further decreased. The 12bit digital-to-analog converter was fabricated in a TSMC 0.18μm CMOS technology. It is based on a current steering dual segment with both thermometer coded 4+8 architecture.