标题: 具二区段式温度计编码架构的12位元500百万赫芝电流式互补式金氧半导体数位类比转换器
12-bit 500MSample/s Current-Steering CMOS D/A Converter with Dual-Segment Thermometer-Code Architecture
作者: 张维欣
Wei-Shin Chang
洪崇智
Chung-Chih Hung
电机学院IC设计产业专班
关键字: 数位-类比转换器;温度计码;DAC;Thermometer-Code
公开日期: 2008
摘要: 本论文设计实现一个12位元500MHz的数位类比转换器, 选取电流式架构让数位-类比转换器输出级的设计上不需要设计额外放大器来做电流电压转换,降低功率消耗并符合高速与高解析度的应用。

电流式数位类比转换器设计需考量因制程造成电流源不匹配效应,对电流源电晶体大小进行最佳化后来降低对静态特性DNL与INL上的不理想性。进而针对因电路造成的输出突波的非理想性加以改善所以加入二元顺序判别电路的机制让数位-类比转换器电路一次只打开一个电流源, 降低突波效应, 得到较佳的动态特性表现, 并配合选择顺序最佳化与四象限对称布局安排来降低阶梯误差与系统误差。

电流式数位类比转换器由4 + 8位元用二区段式温度计编码架构组成。采用TSMC 0.18 µm 1P6M mixed□signal CMOS 制程來实现,整体晶片面积为1.8648mm2。
The thesis presents a 12bit 500MHz digital-to-analog-converter (DAC) by using a current-steering architecture. The output of the DAC does not require an extra output buffer to convert I to V so as to achieve lower power consumption, and to suit for high speed and high resolution application.
The current steering DAC needs to deal with the issue of the current source mismatch due to process fabrication. Therefore current sources are first optimized by transistor size to reduce no-ideal integral nonlinearity (INL) and differential nonlinearity (DNL) effects on static performance. To reduce non-ideal glitch effects, binary order decision circuits are implemented in the current-steering DAC to allow only one current source opened every time for getting better performance. Combined with optimized switching sequence and symmetric current source array arranged as a two-dimensional common centroid floor plan, gradient effects and symmetric errors can be further decreased.
The 12bit digital-to-analog converter was fabricated in a TSMC 0.18μm CMOS technology. It is based on a current steering dual segment with both thermometer coded 4+8 architecture.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009595518
http://hdl.handle.net/11536/40140
显示于类别:Thesis


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