完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | WU, CY | en_US |
| dc.contributor.author | SHIAU, MC | en_US |
| dc.date.accessioned | 2014-12-08T15:05:30Z | - |
| dc.date.available | 2014-12-08T15:05:30Z | - |
| dc.date.issued | 1990-09-01 | en_US |
| dc.identifier.issn | 0278-0070 | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/43.59076 | en_US |
| dc.identifier.uri | http://hdl.handle.net/11536/4027 | - |
| dc.language.iso | en_US | en_US |
| dc.title | EFFICIENT PHYSICAL TIMING MODELS FOR CMOS AND-OR-INVERTER AND OR-AND-INVERTER GATES AND THEIR APPLICATIONS | en_US |
| dc.type | Note | en_US |
| dc.identifier.doi | 10.1109/43.59076 | en_US |
| dc.identifier.journal | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | en_US |
| dc.citation.volume | 9 | en_US |
| dc.citation.issue | 9 | en_US |
| dc.citation.spage | 1002 | en_US |
| dc.citation.epage | 1009 | en_US |
| dc.contributor.department | 電控工程研究所 | zh_TW |
| dc.contributor.department | Institute of Electrical and Control Engineering | en_US |
| dc.identifier.wosnumber | WOS:A1990DU76600009 | - |
| dc.citation.woscount | 1 | - |
| 顯示於類別： | 期刊論文 | |
