| 標題: | EMOTA - AN EVENT-DRIVEN MOS TIMING SIMULATOR FOR VLSI CIRCUITS |
| 作者: | SHEN, WZ JOU, SJ TAO, YS 交大名義發表 電子工程學系及電子研究所 National Chiao Tung University Department of Electronics Engineering and Institute of Electronics |
| 公開日期: | 1-Aug-1990 |
| URI: | http://hdl.handle.net/11536/4054 |
| ISSN: | 0956-3768 |
| 期刊: | IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS |
| Volume: | 137 |
| Issue: | 4 |
| 起始頁: | 279 |
| 結束頁: | 290 |
| Appears in Collections: | Articles |
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- EVENT-DRIVEN INCREMENTAL TIMING FAULT SIMULATOR / JOU, SJ;CHIOU, SH;TAO, YS;SHEN, WZ
- 超大型積體電路類比數位混合式模擬器之設計 / 白祥麟;Jony Shiang Lin Bie;莊紹勳;Steve S.Chung
- ESD implantation for subquarter-micron CMOS technology to enhance ESD robustness / Ker, MD;Hsu, HC;Peng, JJ
- A compiled-code parallel pattern logic simulator with inertial delay model / Huang, KC;Lee, CL;Chen, JE
- ESD protection design for mixed-voltage I/O buffer with substrate-triggered circuit / Ker, MD;Hsu, HC
- ESD Protection Design With Lateral DMOS Transistor in 40-V BCD Technology / Wang, Chang-Tzu;Ker, Ming-Dou
- Circuit performance degradation of switched-capacitor circuit with bootstrapped technique due to gate-oxide overstress in a 130-nm CMOS process / Chen, Jung-Sheng;Ker, Ming-Dou
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