應用於 3.1~10.6GHz 超寬頻射頻前端發射器之設計

Abstract

由於對低功率、高傳輸速率無線網路的需求日與劇增，傳統的無線網路規格IEEE 802.11 a/b/g 已經無法提供滿足此需求。本篇論文闡述一個應用於3.1~10.6 GHz之超寬頻射頻前端發射器的設計方法與製作技術並依據國際電子電機學會所制定的802.15.3a規格作設計。論文中提出的超寬頻射頻前端發射器使用0.13μm互補式金氧半製程設計與製造，並整合了有寬頻射頻放大器和一個寬頻正交升頻混波器，基於量測需要，此晶片同時整合一個一比二除頻器以及多相位濾波器作為正交訊號產生的用途。本電路並採用了inductance peaking 的技術來實現3.1~10.6 GHz超寬頻全頻段的應用。 根據量測結果，此超寬頻射頻前端發射器的平均頻寬內增益為10.25 dB，並在可量測頻寬3.1~6.2 GHz之間有正負2.9 dB的增益波動，輸出1dB增益壓縮點為5.57 dBm，輸出端三諧交越點為17.38 dBm。此發射器電路操作在1.2-V的工作電壓下，功率消耗為49 mW，晶片面積為1930×1635 μm2。量測用的一比二除頻器在最高工作電壓時功率消耗會達到 49.3 mW，遠高於模擬結果。 此外，本論文將會討論造成此發射器功能不完全，以及除頻器功率消耗遠多於模擬結果的原因，並提出解決與修正的方法重新模擬。最後，經由重新模擬以及修正電路後的結果，證實此發射器可實現一個低功率、高傳輸速率無線通訊系統。在未來研究中將會進行一完整的寬頻收發器的實現以及整合。

As the increasing demands for low-power and high data-rate wireless communication, conventional wireless local area network of IEEE 802.11 a/b/g has found it difficult to suffice these requirements. In this thesis, the design methodology and implementation of a 3.1~10.6 GHz direct-conversion transmitter for UWB application are presented according to the recently published IEEE 802.15.3a specification. The CMOS integrated 3-GHz to 10.6-GHz transmitter for full-band UWB applications is proposed and designed in 0.13-μm CMOS technology. The designed UWB transmitter is integrated with a quadrature up-conversion mixer and a balanced RF amplifier; for measurement purpose of quadrature LO/ IF signals generation, a divide-by-2 frequency divider and a 3-stage cascaded poly-phase filter are also designed in this chip. The technique of inductance peaking has been adopted to achieve full band operation for UWB applications. Based on the measurement results, the transmitter has an average conversion gain of 10.25 dB with the gain ripple of around ±2.9 dB among frequency 3.1 ~ 6.2 GHz. The average output 1-dB compression point (OP1dB) of the measured bands is 5.57 dBm and the average OIP3 of the measured bands is 17.38 dBm. The transmitter dissipates the power of 49 mW from the supply voltage of 1.2 V and occupies the chip area of 1930×1635 μm2. The divide-by-2 divider of measurement purpose consumes 49.3 mW at most, which is much larger than the simulation result. A discussion about the malfunction of the transmitter and the extraordinary high power consumption of the frequency divider is made; furthermore, a modification and revised post-simulation of the transmitter are proposed and done for further verification. In the revised post-simulation results, the proposed transmitter is confirmed to be suitable for low-power and high data-rate wireless communication systems. Future research will be conducted to implement a thorough transceiver for UWB applications.