50um CuNi/SnAg 金屬墊層覆晶銲錫凸塊之電遷移研究

Abstract

高接腳密度、縮減封裝體積等優勢，讓覆晶銲錫在電子產品走向 輕、薄、短、小的趨勢中，成為高階元件的主流封裝型式。伴隨積體 電路高電流、小尺寸的設計變化，覆晶銲錫接點內的電遷移現象成為 元件可靠度的影響關鍵。本研究設計並製造凱文結構來研究銅鎳墊層於共晶錫鉛銲錫接著下，其電遷移活化能的大小，在量測上，利用凱文結構來觀測銲錫凸塊在電遷移下電阻變化情形，並定義電遷移破壞準當其阻值上升至初始的1.2 倍。然而大部分的研究都定義當整個迴路開路時，為其破壞標準。 本研究探討在在銅鎳墊層的無鉛覆晶錫銀銲錫接點於 170℃ 的溫度下，通以電流 0.5 A & 0.6 A 之電遷移行為及其破壞機制。利用凱文結構來觀察銲錫凸塊在電遷移下電阻變化情形，不同電流的破壞機制將個別被討論。

Flip-chip technology has become a mainstream trend in advanced electronic packaging because of its capability of higher I/O density and smaller package size. With higher current and smaller size trends, electromigration in flip-chip solder has become an critical of reliability concern. Activation energy of electromigration is investigated in eutectic SnAg flip-chip solder joints with thick under-bump-metallizations (UBMs) of 5-μm Cu/3-μm Ni. We fabricate the Kelvin probes to monitor the bump resistance during the current stressing, and define the electromigration failure as the bump resistance increase reaches 20% of its initial value. Most of the previous studies defined the failure of the electromigration when the stressing circuit was open. In this study, we fabricated SnPb solder joints with under-bump-metallizations (UBMs) of Cu /Ni. The sample were subjected to electromigration tests by 0.5A &0.6A at 170℃. The electromigration behavior and the mechanism which cause the damage of the bumps were been monitored at various stages of electromigration. The Kevin probes were employed to monitor the changes for the bump resistance during the electromigration tests and the mechanisms which cause damage to the joints were discussed for these two different currents, respectively.