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dc.contributor.author徐金詳en_US
dc.contributor.authorSyu, Jin-Siangen_US
dc.contributor.author孟慶宗en_US
dc.contributor.authorMeng, Chinchunen_US
dc.date.accessioned2014-12-12T01:24:48Z-
dc.date.available2014-12-12T01:24:48Z-
dc.date.issued2010en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079513570en_US
dc.identifier.urihttp://hdl.handle.net/11536/41103-
dc.description.abstract本論文中分作五個章節,包含了各式混頻器和接收機之效能改善。在第二章中提出單頻帶和雙頻帶之高線性度吉伯特升頻器。利用輸入端之偏壓偏移交錯耦合對與輸出端之並聯回授緩衝放大器,使升頻器之輸出端三階交調截點與輸出端1-dB壓縮點差距高達22 dB。 第三章利用相量表示方式完整地分析和比較各式被動正交信號產生器,包含了振幅和相位與頻寬的關聯。此外,雙極性接面電晶體之主動混頻器比互補式金氧半導體之主動或被動混頻器擁有更寬的轉換增益平坦區,因此有著更佳的正交本地振幅不平衡之容忍度。應用於吉伯特混頻器本地振盪源埠之正交耦合器若直接在高損耗矽基板上製作,可縮小面積但會有輸出振幅不相等的特性,正好可以利用選取適當之本地振幅而改善。另一方面,利用LR-CR正交相位產生器並配合雙極性接面電晶體主動混頻器成功地實現一接收機,並且在超寬頻應用頻帶中輸出端之信號振幅與相位誤差分別低於±1dB和±2°。 在第四章中,於0.35毫米矽鍺異質接面電晶體製程中利用補償相位延遲技術實作一個高隔離度之次諧波降頻器。在相同偏壓條件、電晶體大小和操作頻率下,使用補償相位延遲技術與傳統無使用此技術之電路可得到相似之轉換增益、雜訊指數和線性度,卻額外改善了34/35 dB的2LO至RF/IF埠隔離度,8/9 dB的LO至RF/IF埠隔離度和22 dB的RF至IF埠隔離度。 第五章則利用了相量分析方式來討論在雙降頻低中頻接收機中鏡像抑制效能衰減之原因。因此,分別在射頻輸入端或兩級混頻器中間適當地擺放額外的多相位濾波器均可以大大地改善鏡像抑制效能,使得在本地振盪源之正交信號誤差和元件不匹配仍然存在的情況下,達到接近中頻多相位濾波器之鏡像抑制比的理論極值。 第六章則介紹了在低成本0.18毫米互補式金氧半導體製程下應用於低功率低雜訊直接降頻接收機。在標準互補式金氧半導體製程中,深N型井雙極性接面電晶體因為其超低之閃爍雜訊和較佳之轉導而被有效地應用於混頻器和基頻放大器中,然而其相對低的截止頻率在混頻器的應用上也造成了額外的挑戰。因此,透過詳盡地分析操作在低截止頻率之吉伯特混頻器,電感式突起技術被用以降低本地振盪輸出之損耗和增加混頻器之轉換增益。另一方面,次諧波混頻機制為另一解決低截止頻率之方式並搭配低損耗的八相位多相位濾波器實作一低功率低雜訊次諧波直接降頻接收機。最後,利用可調頻式雙級低雜訊放大器和寬頻之八相位本地振盪產生器,實作了一涵蓋完整U-NII頻段之低功率低雜訊接收機,其中同時利用電感式突起和次諧波混頻機制成功讓接收機之射頻頻率可以為深N型井雙極性接面電晶體之三倍截止頻率。zh_TW
dc.description.abstractThis dissertation consists of five chapters, including performance improvements of various mixer topologies and receivers. Chapter 2 introduces single-/dual-band highly linear Gilbert upconverters. The difference of OIP¬3 and OP1dB, widely used as a criterion for mixer linearity, is over 22 dB by using an input bias-offset cross-coupled pair and output shunt-shunt feedback buffer amplifier. In Chapter 3, passive quadrature signal generators are deeply discussed, including amplitude/phase relations by using phasor analyses. Further, a bipolar-juncion- transistor (BJT)-based Gilbert mixer inherently has a wider flat-gain region and more toleration of LO amplitude imbalance than MOS active/passive mixers. Thus, the loss imbalance of the LO quadrature coupled-line coupler directly implemented on a lossy silicon substrate can be simply solved by choosing proper LO power in the common flat-gain region. On the other hand, an ultra-wideband (UWB) Gilbert downconverter using an LR-CR quadrature generator, which has always perfect quadrature phase but balanced amplitudes only at the center frequency. However, the BJT mixer successfully compensates this drawback and achieves amplitude/phase imbalance below ±1dB/±2° covering whole UWB bands, respectively. In Chapter 4, a 0.35-μm SiGe heterojunction bipolar transistor (HBT) high-isolation sub-harmonic mixer is proposed using a delay compensation technique. The sub-harmonic mixers with and without delay compensation are demonstrated at the same bias condition, device sizes and operating frequency. As a result, similar conversion gain, noise figure and linearity are achieved. However, the 2LO-to-RF/IF isolation is improved by 34/35 dB, the LO-to-RF/IF isolation by 8/9 dB and the RF-to-IF isolation by 22 dB. Chapter 5 fully discusses the reasons for the degradation of the image rejection performance in a dual-conversion low-IF receiver by using phasor analyses. By inserting the poly-phase filters (PPFs) at proper positions (RF stage or inter-stage between two downconversions), the image-rejection ratio (IRR) can nearly reach the theoretical limit of the IF PPF even if the LO quadrature imbalance and device mismatches still exist. Finally, Chapter 6 introduces various techniques in designing a low-power low-noise direct-conversion receiver (DCR) in a low-cost 0.18-μm CMOS technology. Deep-n-well (DNW) BJTs in standard 0.18-μm CMOS process are used for lower flicker noise and higher transconductance than standard NMOS devices. But the relatively low cut-off frequency (fT) becomes a big challenge for the mixer application. Thus, the current switching operation of the BJT switching function operating near or even higher than the device fT is fully analyzed. An inductive peaking technique is then used to compensate the loss of the LO generator and the mixer conversion loss. On the other hand, a sub-harmonic mixing is another straightforward solution for the low-fT operation, but a low-loss octet-phase PPF is analyzed and employed to generate well-balanced octet LO signals. Furthermore, a low-power sub-harmonic DCR covering whole U-NII bands is also demonstrated in this chapter by using a two-stage tunable-band RF low-noise amplifier (LNA) and a wideband octet-phase generator.en_US
dc.language.isoen_USen_US
dc.subject互補式金氧半導體zh_TW
dc.subject閃爍雜訊zh_TW
dc.subject吉伯特混頻器zh_TW
dc.subject次諧波混頻器zh_TW
dc.subject低中頻接收機zh_TW
dc.subject直接降頻接收機zh_TW
dc.subjectCMOSen_US
dc.subjectflicker noiseen_US
dc.subjectGilbert mixeren_US
dc.subjectsub-harmonic mixeren_US
dc.subjectlow-IF receiveren_US
dc.subjectdirect-conversion receiveren_US
dc.title應用於解決CMOS閃爍雜訊之低中頻接收機架構和深N型井雙極性接面電晶體直接降頻接收機zh_TW
dc.titleCMOS Flicker Noise Solutions by Low-IF Receiver Architecture and Deep-N-Well BJT Direct-Conversion Receiveren_US
dc.typeThesisen_US
dc.contributor.department電信工程研究所zh_TW
Appears in Collections:Thesis


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