利用凝膠轉塗佈法製備高介電常數鈦酸鎳閘極介電質層於複晶矽薄膜電晶體之研究

Abstract

在此論文裡，利用新穎低溫技術凝膠旋塗佈法製備具高介電常數的鈦酸鎳介電質層，並對五百到九百度不同溫度熱退火後的樣品做材料與物理特性分析，接著將所得之電性結果應用在複晶矽薄膜電晶體上做進一步之研究。從X光繞射光譜分析圖可得知此塗佈上去的鈦酸鎳介電質層的結晶溫度大約介於六百與七百度之間。掃描式探針顯微鏡所顯示在經過不同溫度熱退火之後的鈦酸鎳介電質層的表面形貌，藉此可發現當溫度高於六百度後，樣品的表面粗操度會隨著溫度上升而產生劇烈的劣化現象。由化學分析電子能譜儀的結果顯示，所有的樣品都含有鎳-氧與鈦-氧兩種金屬氧化鍵，另外又發現在低溫兩百度烘烤會有氫氧化物的存在。而更進一步的化學分析電子能譜儀分析確定了此塗佈上去並經過六百度熱退火的介電質層的原子濃度比例，[Ni]：[Ti]：[O]約為1：1：3。利用高解析度穿透式電子顯微鏡所拍之影像與對應的電容電壓曲線圖，求得介電質鈦酸鎳的介電常數的範圍值約介於36~42之間。此外，由電容電壓曲線圖可看出鈦酸鎳介電質具有較薄的電容等效厚度與較高的閘極電容密度。

接下來將凝膠旋塗佈法應用於固相再結晶複晶矽薄膜電晶體上，且鈦酸鎳介電質層經過五百、六百與七百度三種溫度的快速熱退火處理。從種種電性量測結果得知，經過五百度熱處理的樣品明顯電性優於其它六百與七百度熱處理的樣品。之後，取五百度熱處理樣品另外做氨電漿處理發現，經過氨電漿鈍化處理的電晶體在元件性能以及臨界電壓下降特性上都有顯著的改善。此論文所提出製程薄膜電晶體的技術即便沒有添加其它電漿處理或是先進窄製程窗相結晶技術，都能擁有不錯的電性結果。

In this thesis, the high-κ NiTiO3 dielectrics are prepared at different annealing temperatures from 500°C to 900°C by a sol-gel spin coating method, which is a novel low-temperature technique to form thin films. The X-ray diffraction (XRD) spectrum describing the crystallization temperature of the spin-on dielectric is between 600°C and 700°C. The scanning probe microscope (SPM) images display that the surface roughness abruptly increases with the annealing temperature higher than 600°C. The electron spectroscopy for chemical analysis (ESCA) exhibits the metal-oxide bonds of Ni-O and Ti-O in all samples and the hydroxides in 200°C-baking sample. Besides, the ESCA also proves that the atomic concentration ratio of the spin-on dielectric with 600°C-RTA treatment is [Ni]:[Ti]:[O] ~ 1:1:3. The high dielectric constant (High-岂) of the NiTiO3 material calculated to be in a range of 36 ~ 42 is extracted from the high-resolution transmission electron microscopy (HR-TEM) image and the corresponding C-V curves. The C-V curves shows that the NiTiO3 gate dielectric can achieve a thin capacitance equivalent thickness (CET) and high gate capacitance density. The solid-phase crystallized (SPC) poly-Si TFTs with a NiTiO3 gate dielectric prepared by the sol-gel spin coating method with 500°C, 600°C and 700°C-RTA treatments have been demonstrated. The electrical characteristics of the poly-Si TFTs with NiTiO3 gate dielectric (poly-Si NiTiO3 TFTs) at 500°C annealing temperature are better than that at 600°C and 700°C-RTA treatments. The device performance and threshold-voltage rolloff properties of the poly-Si NiTiO3 TFTs with 500°C-RTA treatment can be significantly improved with a NH3 plasma passivation. The proposed poly-Si NiTiO3 TFTs crystallized by the SPC technique could possess good electrical properties even without additional plasma treatments or other advanced phase crystallization techniques with narrow process window.