標題: 一個應用於無限近身網路發射器之低功率類比基頻電路
A Low Power Analog Baseband Circuit of Transmitter for Wireless Body Area Network
作者: 賴炯為
Lai, Chiung-Wei
陳巍仁
Chen, Wei-Zen
電子研究所
關鍵字: 類比基頻電路;數位類比轉換器;analog baseband circuit;DAC
公開日期: 2011
摘要: 本篇論文提出一個應用在無線網路發射器之低功率類比基頻電路,可以將輸入端的數位訊號轉換為類比訊號,做為射頻電路傳輸用。 為了達到低功率的要求,在此採用了切換電容架構去實現數位類比轉換器,在一般的設計上,由於運算放大器的有限頻寬使得此種架構的速度無法太快,在此利用額外的時脈控制開關的切換形成回歸到零架構來解決此問題。電容陣列的排序減低拉線所造成的寄生電容效應,進而避免造成電容比例誤差,其後經過重建濾波器使得降低量化雜訊。本電路可以操作的取樣頻率為每秒20百萬次的速度,整體解析度為10個位元。整體晶片消耗功率約1.97毫瓦。在5.01MHz頻率下,無雜散動態範圍(SFDR)為72dB。
The thesis presents a solution of the low power analog baseband circuit of transmitter for wireless body area network which could convert the input digital signal into analog output so as to provide transmission of RF circuit. In order to achieve low power consumption, switched-capacitor architecture is applied to perform digital-to-analog converter. In general case, the limited bandwidth of operational amplifier restricts the operating speed of this architecture. Using additional switches connected to the buffer controlled by additional clock phase to form return-to-zero architecture are proposed to resolve this problem. And the sort of the capacitor network reduces the routing parasitic capacitance so as to avoid a considerable influence on the ratio of capacitances. After subsequent reconstruction filter, the quantization noise and image frequency are decreased. The sampling frequency can operate to 20MHz/s with 10-bits resolution. The SFDR is 72dB at 5.01MHz. The total power consumption is 1.97mW.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079611641
http://hdl.handle.net/11536/41766
Appears in Collections:Thesis


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