Full metadata record
DC Field | Value | Language |
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dc.contributor.author | 吳明錡 | en_US |
dc.contributor.author | Wu, Ming Chi | en_US |
dc.contributor.author | 曾俊元 | en_US |
dc.contributor.author | Tseng, Tseung Yuen | en_US |
dc.date.accessioned | 2014-12-12T01:27:27Z | - |
dc.date.available | 2014-12-12T01:27:27Z | - |
dc.date.issued | 2011 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT079611810 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/41808 | - |
dc.description.abstract | 在現今半導體工業當中,商用電子產品,如 : 手機、筆記型電腦、隨身型儲存裝置等之需求明顯大幅上升。以矽為主之快閃記憶體由於其高積體密度與低製作成本因素是現今非揮發性記憶體的主流。然而它有著許多缺點,包含:較差的耐久力、低的操作速度與高的操作電壓。再者隨著電子元件不斷微縮之下,快閃式記憶體將遇到物理製作極限導致其無法接受的低記憶時間能力,其因在微縮的尺度下快閃式記憶體之保持電子能力下降。下世代非揮發性記憶體有:鐵電記憶體、磁記憶體、相變化記憶體與電阻式記憶體等,其正如火如荼地發展。而其中電阻式記憶體因其高操作速度、長記憶時間、高操作次數、非破壞性讀取能力、低功率操作、低操作電壓、簡單結構、高微縮能力與可多組記憶能力等優點被廣泛研究以期待成為下世代非揮發性記憶體元件。 然而。電阻式記憶體仍面臨高操作電流與相關可靠度問題等重要瓶頸以至無法成為商用電子產品。 本論文製作出鈦為上電極與鉑為底電極之氧化鋯記憶元件體與電晶體串接為一電阻器與一電晶體之記憶晶胞(1T1R).此測試元件展現出低操作電流 (20微安培)、低操作電壓(寫入/抹除, 0.8/-1 伏特)、與低操作電流所儲存記憶狀態於攝氏80度之下可保持10年以上之特性。此外單顆元件藉由調變電晶體之閘極電壓也展現出多組儲存能力。不同操作電流下所導致電阻式記憶體有著不同數量與強度之氧氣空缺組成之導電路徑。其元件也展現出高達2000次之操作次數。 更近一步的評估此氧化鋯電阻式記憶體之應用能力,本文章做了更多的電性分析。多組記憶狀態能力於先前已被討論過,在此更提出用調變抹除電壓的方式來達成多組低阻值記憶狀態,不同元件面積測試中也再次確定氧化鋯電阻式記憶體是由特定導電路徑之存在與否來決定其高低阻態。實際應用方面,此元件也展現出250奈秒之操作速度。元件之溫度穩定性也是研究的重點,其中發現高低阻態之電流值只會隨著溫度些微上升不會造成資料錯誤之情況。此外也可發現隨著溫度的升高其操作電壓呈現下降的趨勢。最後提出新型元件操作方式,元件利用固定電晶體串聯電阻式記憶體端之電壓使其位於軟性崩潰狀態,同時藉由調變電晶體之閘極電壓來決定其低電阻態方式來操作1T1R記憶晶胞,此方法比傳統方式更可穩定其性能。 本論文也將研究重點放在改善氧化鋯元件之單極性操作特性上面。故於原本傳統之鈦上電極與鉑底電極之氧化鋯記憶元件之氧化鋯層當中嵌入一鈷金屬層。藉由退火方式來改善元件特性。由穿隧式電子顯微鏡、能量散射X射線分析儀、與電子能譜儀分析結果顯示其鈷金屬層轉換成鈷奈米顆粒。由結果也顯示鈷奈米顆粒並無氧化仍為金屬特性。此新型元件展現出低形成電壓與穩定之負極性之單極性操作特性。此外於論文當中此元件之可能電阻轉態機制被提出討論。 此嵌入式鈷奈米顆粒電阻記憶體元件與電晶體串接之記憶晶胞也於本論文當中被製作與討論。相同的,元件也展現出低形成電壓、低操作電流、低操作電壓、多組記憶儲存能力與優異的非破壞性讀取能力。此元件同時間展性出穩定之負電壓之單極性操作能力與正電壓寫入與負電壓抹除雙極性操作能力。電場影響氧氣離子移動之物理模型可以成功解釋此高低電阻轉換操作行為。由此結果可證明新型之嵌入式鈷奈米顆粒元件與電晶體串接之記憶晶胞有著高度的潛力成為下世代非揮發性記憶體。 最後對全文作總結,並對未來可行的研究工作做建議。 | zh_TW |
dc.description.abstract | Consumer electronic products, such as the mobile phone, laptop, and USB storage devices, the demand of nonvolatile memory (NVM) has increased significantly in recent years. Today, Si-based Flash memory devices represent the most prominent NVM owing to their high density and low fabrication costs. However, Flash suffers from low endurance, low write speed, and high voltage. Moreover, the dimension as scaled toward 10nm region, flash memory device will have serious reading challenges such as an unacceptable degradation of retention characteristic due to increasing difficulty of retaining electrons. Several novel nonvolatile memory devices such as ferroelectric random access memory (FRAM), magnetic random access memory (MRAM), phase change memory (PCM), and resistive random access memory (RRAM) are extensively investigated to replace flash memory devices. Among these, RRAM has received great attention as the next generation nonvolatile memory device due to the advantages of high operation speed, long retention time, high endurance, nondestructive readout, low power consumption, low operation voltage, simple constitution, high scalability, and multi-bit data storage capability for ultra-high density integration. However, the RRAM devices still face some important unrevealed problems such as the high set/reset currents (Iset/Ireset) issue and the reliability issues, which are the main restriction for the real market application. In this dissertation, the Ti/ZrO2/Pt resistive memory devices with 1 transistor and 1 resistor (1T1R) architecture are fabricated. The devices show low operation current (20 μA), low switching voltage (Set/Reset, 0.8/-1 V), and reliable data retention for low resistance state (LRS) with 20 μA set current at 80 oC (over 10 years), via an excellent current limiter, MOSFET. In addition, the multi-level storage characteristics are also demonstrated by modulating the amplitude of the MOSFET gate voltage. The various LRS levels obtained are possibly attributed to the formation of different number and sizes of conducting filaments consisting of oxygen-vacancies caused by external electric field. Moreover, the reproducible resistive switching characteristics up to 2000 switching cycles are achieved in the same device. To further gauge the ZrO2 based RRAM devices for NVM application, more electrical measurement are carried out. Multilevel storage behavior was observed by modulating the amplitude of the MOSFET gate voltage, in which the transistor functions as a current limiter. Furthermore, multilevel storage was also executed by controlling the reset voltage, leading the resistive random access memory (RRAM) to the multiple metastable LRS. Electrical properties of various sized devices were also measured to investigate their RS mechanism, where the experimental results confirm that the RS mechanism of the Ti/ZrO2/Pt structure obeys the conducting filaments model. In application consideration, the devices also exhibit the high-speed switching performances (250 ns) with suitable high/low resistance state ratio (HRS/LRS > 10). Temperature instability and retention properties of the devices were also investigated. The currents in HRS and LRS increase slightly as the temperature increases from 25 to 150 oC for a stable resistance ratio between memory states. It is also found that the Set and Reset voltages for 20 μA operation current decrease from 0.9 and -1.4 V to 0.5 and -0.8 V, with ambient temperature change from 25 to 150 oC, respectively. Furthermore, the ramping gate voltage method with fixed drain voltage is used to switch the 1T1R memory cells for upgrading the memory performances. Our experimental results suggest that the ZrO2 based RRAM is a prospective alternation for nonvolatile multilevel memory device applications. To further improve the unipolar RS (URS) characteristic in ZrO2 based RRAM, the preparation and electrical properties of Ti/Co embedded (Co-E) ZrO2/Pt resistive switching memories are investigated. The formation of Co nano-dots in ZrO2 thin film after the memory device annealed at 600 oC in N2 ambient for 60 s is confirmed by using transmission electron microscopy, energy dispersive X-ray analyzer, and X-ray photoelectron spectroscopy. No chemical reaction occurs between Co and ZrO2 during the 600 °C post annealing process. The new devices exhibit low forming voltage (-1.5~-2.8 V) and robust negative bias URS behaviors. Such stable switching behaviors are attributed to small negative polarity set voltage (-1.1~-1.6 V). A physical model based on filament mechanism is employed to explain the switching behaviors. The results show that the Co-E device has high potential for ultra high density nonvolatile memory applications. The fabrication and electrical properties of Ti/Co nano-dots embedded ZrO2/Pt resistive switching memories with 1 transistor and 1 resistor (1T1R) architecture are also investigated in this thesis. The device exhibits low forming voltage of ~2 V, low operation current (20 μA), low operation voltage, multi-level storage characteristics, and superior nondestructive readout performance. The device shows stable negative bias URS as well as bipolar switching behaviors. A physical model based on oxygen ions migration phenomenon induced by electric field and conducting filament mechanism is employed to explain the switching behaviors. As a result, the Ti/Co nano-dots Embedded (Co-E) ZrO2 /Pt 1T1R RRAM device has high potential for next generation nonvolatile memory applications. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 電阻式 | zh_TW |
dc.subject | 非揮發記憶體 | zh_TW |
dc.subject | 二氧化鋯 | zh_TW |
dc.subject | 電晶體 | zh_TW |
dc.subject | Resistive Switching | en_US |
dc.subject | RRAM | en_US |
dc.subject | ZrO2 | en_US |
dc.subject | MOSFET | en_US |
dc.title | 氧化鋯電阻式記憶元件搭配場效電晶體之特性研究 | zh_TW |
dc.title | A Study on ZrO2 based Resistance Switching Nonvolatile Memory with 1T1R Architecture | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
Appears in Collections: | Thesis |