前授第三次諧波失真信號以提升線性度之互補金氧半轉導放大器設計

Abstract

隨著製程技術的進步，CMOS製程已經由深次微米朝向奈米技術發展，由於奈米技術的使用，短通道效應影響轉導放大器的線性度效能越來越明顯，而電晶體飽和區的公式將會受到短通道效應的嚴重影響，因此許多由理想電流公式所衍伸出的傳統轉導放大器架構在先進的製程中所受到的非理想效應，比起過去製程將會更多。同時在深次微米的製程技術中，工作電壓漸漸的下降，電晶體的臨界電壓值也越來越小，這樣的環境下，電路設計上面臨了許多的挑戰。電路的功率消耗與工作電壓成正比降低，而在現今可攜式裝置中，低功率低消耗的特性要求越來越高下，新製程下的設計與研發都具有相當的前瞻性以及發展性。 本論文提出一種以前授第三次諧波失真信號之方法提升線性度，用以補償短通道效應所產生之非線性諧波成分。同時，此方法運用在兩種傳統的轉導放大器架構之上。其一為虛差動對輸入轉導放大器，其二為源極降低技術轉導放大器。此外，本論文將介紹轉導放大器的主要應用：轉導電容式濾波器。於論文最後，將介紹一個轉導電容式四階低通濾波器的設計過程與完成。 採取前授第三次諧波失真信號之方法的虛差動對輸入轉導放大器，其工作電壓為1.2V並消耗功率0.47mW。當輸入信號為頻率50MHz且振幅為0.4Vpp時，可達到第三次諧波失真為-62dB。此轉導放大器以台積電0.18μm CMOS製程實現，使用面積為0.35×0.35mm2. 採取前授第三次諧波失真信號之方法的源極降低轉導放大器，其工作電壓為1.5V並消耗功率1.25mW。當輸入信號為頻率10MHz且振幅為0.6Vpp時，可達到第三次諧波失真為-56dB。而以此轉導放大器所組成的轉導電容式濾波器，其工作電壓為1.5V並消耗功率10.7mW。當輸入信號為頻率3MHz且振幅為0.6Vpp時，可達到第三次諧波失真為-48dB。此轉導電容式濾波器以台積電0.18μm CMOS製程實現，使用面積為0.67×0.95mm2.

With the advance of the CMOS process technology, more and more circuits are suffering from the short channel effect, which becomes a main issue as the technology marches to deep-submicron fields. Compared with the former process technology, the influence of the short channel effect on the design of operational transconductor amplifier (OTA) becomes more serious and makes the circuit performance deviated from the ideal voltage-current equation, especially the performance of the linearity. Therefore, various researches to compensate short channel effects have been published. In the deep-submicron technology, numerous new challenges appear because of the lower supply voltage and lower threshold voltage. Simultaneously, the power consumption which is directly proportional to the supply voltage can be reduced and it is expectant for the portable devices. Therefore, designs and researches for new CMOS deep-submicron technology are highly expected. In this thesis, a new concept of the HD3 feedforward technique, which can compensate the influences of the short channel effect, is proposed for linearity improving. Meanwhile, the method is applied to two traditional transconductor structures, including pseudo differential and source degeneration. Moreover, a transconductance-C filter based on proposed OTA was also designed. The pseudo-differential transconductor with HD3 feedforward technique works under a 1.2V supply voltage with 0.47mW power consumption. The measurement results show the HD3 of -62dB with 0.4-Vpp 50MHz input signal. The chip is fabricated in TSMC 0.18μm CMOS technology occupies 0.35×0.35mm2. The source-degeneration transconductor with HD3 feedforward technique shows the measurement result of -56dB in HD3 with 0.6-Vpp 10MHz input signal under a 1.5V supply voltage with 1.25mW power consumption. The chip also fabricated in TSMC 0.18μm CMOS technology occupies 0.67×0.95mm2.