標題: | 應用於超寬頻系統之電流再利用低雜訊放大器、9-26GHz寬頻互補式電晶體低雜訊放大器之設計與研究 Design of Current-Reused LNA for UWB,9-26GHZ Wideband CMOS LNA |
作者: | 林宗廷 Lin,Tsung-Ting 周復芳 Jou, Christan F. 電信工程研究所 |
關鍵字: | 超寬頻;低雜訊放大器;互補式電晶體;Ultra Wideband;low noise amplifier;CMOS |
公開日期: | 2008 |
摘要: | 本論文的第一部份提出一超寬頻低雜訊放大器。此電路輸入阻抗之匹配是利用電流再利用應用於LC Ladder使得此架構適合低電壓使用,然而在利用電流再利用之技術來放大射頻訊號。因此超寬頻低雜訊放大器能夠同時達到輸入端寬頻匹配與高增益。模擬結果:-10dB之輸入與輸出端反射損耗、3.3dB之最小雜訊指數、14.3dB之最高增益並消耗17.75mW之功率。
第二部份針對不同於3.1-10.6GHz的低雜訊放大器設計提出一利用0.18製程所達到9-26GHz之低雜訊放大器。此電路設計是期望能利用L 和R-C 匹配方式,來達到寛頻及相對低的雜訊指數。模擬結果: -10dB之輸入與輸出端反射損耗、低雜訊、高增益於
不同偏壓情況下。 In the first part of this thesis, an ultra-wideband (UWB) LNA is proposed. The input matching of this circuit used a LC Ladder with current-reused so that this topology is suitable for low voltage. Using current-reused to amplify RF signal. Therefore, the proposed LNA can simultaneously achieve input impedance matching and high gain. The simulated results:-10dB input and output return loss, minimum noise figure of 3.3dB, and maximum gain of 14.3dB from 17.75mW. In the second part, a 9-26GHz LNA using 0.18um technology different from 3.1-10.6 GHz (In general, the 0.18um CMOS LNA usually be designed for 3−10GHz operating range.) is proposed. The design of this circuit used L and R-C matching to achieve wideband and low noise figure. The simulated results:-10dB input and output return loss, low noise figure, and high gain at different bias voltage. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT079613620 http://hdl.handle.net/11536/42059 |
顯示於類別: | 畢業論文 |