Full metadata record
DC FieldValueLanguage
dc.contributor.author宋先敏en_US
dc.contributor.authorSung, Hsien-Mingen_US
dc.contributor.author張翼en_US
dc.contributor.authorChang, Yien_US
dc.date.accessioned2014-12-12T01:29:32Z-
dc.date.available2014-12-12T01:29:32Z-
dc.date.issued2009en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079618535en_US
dc.identifier.urihttp://hdl.handle.net/11536/42333-
dc.description.abstract互補式金氧半場效電晶體之發展將在到達22奈米結點時遇到瓶頸,結合高介電質材料與高電子遷移率三五族半導體的研究逐漸受到重視。由於有著極佳的載子傳導特性,三五族金氧半場效電晶體將會是未來高頻低操作偏壓應用的選擇。然而高介電質材料與三五族半導體的介面問題始終阻礙著三五族金氧半元件的發展。隨著薄膜沉積技術的進步,原子層沉積法以及分子束磊晶技術已經能夠成長高品質的介電材料於三五族半導體上研究金氧半電容的特性。 本論文主要利用分子束磊晶機台成長二氧化鉿,氧化鐠和氧化鈰來製作金氧半電容並研究其特性。我們在二氧化鉿與砷化銦鎵的電容上得到了等效氧化層厚度為2.9奈米的良好尺寸微縮特性,並在具有高銦含量的電容上發現了載子反轉的行為。 我們同時也研究了具有相當高介電常數的氧化鐠以及氧化鈰的電容特性,並發現若以氧化鐠取代二氧化鉿將可得到較高的聚集電容值。費米能帶釘扎的問題也在元件退火溫度的研究中得到解決。 氧化鐠與氧化鈰組成的層狀結構的電容特性也同時被研究。我們發現針對層狀結構所作的二步驟退火將可以增加元件的聚集電容值,其原因我們將利用穿透式電子顯微鏡的圖片來說明。zh_TW
dc.description.abstractDue to its superior carrier transport capability, III-V based MOS field effect transistor technology has the potential of being used for future high frequency low power application. However, the lack of high quality native oxides has been the obstacle for years. Thanks to high-k dielectric deposition technology improvement, high quality gate dielectrics can now be deposited on III-V material for MOS capacitor studies, which is very important before fabricating III-V MOSFETs. In this thesis, molecular beam epitaxy (MBE) was used to deposit HfO2, Pr6O11, and CeO2 for MOS capacitors study. Good scalability was obtained with equivalent oxide thickness (EOT) equal to 2.9nm on HfO2/InxGa1-xAs/InP MOS capacitors. The inversion behavior was also observed for high indium concentration InxGa1-xAs, the mechanism is discussed in this thesis. Pr6O11 and CeO2, which have very high dielectric constant, were also deposited on InxGa1-xAs for MOS capacitor study. It was found that after replacing HfO2 with Pr6O11, the accumulation capacitance increases owing to the high dielectric constant of Pr6O11. The annealing temperature was characterized to unpin the surface Fermi level. The CeO2/ Pr6O11 gate stack structure was also studied; two step annealing was introduced to improve the accumulation capacitance. The reason of the capacitance increase was also observed by cross-sectional TEM image.en_US
dc.language.isoen_USen_US
dc.subject金氧半場效電晶體zh_TW
dc.subject三五族zh_TW
dc.subject二氧化鉿zh_TW
dc.subject氧化鐠zh_TW
dc.subject氧化鈰zh_TW
dc.subjectMOSFETen_US
dc.subjectIII-Ven_US
dc.subjectHfO2en_US
dc.subjectPr6O11en_US
dc.subjectCeO2en_US
dc.title結合高介電質材料與三五族半導體之金氧半電容研究zh_TW
dc.titleStudy of High-k/III-V MOS Capacitorsen_US
dc.typeThesisen_US
dc.contributor.department材料科學與工程學系zh_TW
Appears in Collections:Thesis


Files in This Item:

  1. 853501.pdf

If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.