標題: 使用 HS-CPS 架構的微型電感器設計及在振盪器電路上的應用
Miniature Inductor Design Utilizing the HS-CPS Structure and Its Application to VCO circuit
作者: 馬健嘉
Chienchia Ma
郭建男
Chien-Nan Kuo
電子研究所
關鍵字: 電感器;傳輸線;慢波結構;射頻被動元件;互補式金氧半導體;品質因素;Inductor;Transmission line;slow-wave structure;RF passive component;CMOS;Quality factor
公開日期: 2004
摘要: 本篇論文主旨在於提出一種可適用於標準CMOS製程的新式平面電感器架構—使用高慢波係數共平面帶線之微型電感器,並將其運用在壓控振盪器的電路上。 此微型電感器,在相同有效電感值的前提下,面積僅有平面螺旋電感器的 87 %。此成果主要導因於本設計使用高慢波係數共平面帶線,利用增加傳輸線單位長度電容值的方式,可以調整傳輸線的特性阻抗與傳播常數,藉此可降低設計電感器時所需要的傳輸線長度。此外根據傳輸線理論去分析,可設計品質因素最大值發生於所需的工作頻段,作最有效的利用 。 此外,本文也利用此微型電感器應用在 5GHz 壓控振盪器的設計上,特點在使用較小的面積,並適用於標準CMOS 製程,將不需額外的後製程,進而節省了製造成本.。
The aim in this thesis is to develop a new planar miniature inductor utilizing high slow-wave-factor coplanar stripline (HS-CPS) in standard CMOS process, and to exploit the new structure to oscillator applications. The proposed miniature inductor occupies only 87% of the area of the conventional spiral inductor with the same inductance. This size reduction results from the adoption of the HS-CPS line. With the theoretical analysis from the viewpoints of transmission line theory, the peak Q-factor can be designed to occur at desired frequency span. The characteristic impedance Zo and propagation constant β can be adjusted artificially by virtue of the enhancement of distributed capacitance per unit length in HS-CPS. Such approach benefits the overall length reduction of inductor design. Also, the peak Q-factor can be designed to occur at desired frequency span. Moreover, a 5 GHz CMOS voltage-controlled oscillator (VCO), which adopts the proposed miniature inductor, has been implemented. The VCO features in smaller size in the standard CMOS technology. There is no further post processing needed. Consequently, the size and cost of the radio frequency (RF) chip can be reduced.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009111533
http://hdl.handle.net/11536/42957
顯示於類別:畢業論文


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