標題: 適用於CMOS製程之高慢波係數共平面帶線及其在濾波器之應用
High Slow-Wave-Factor Coplanar Stripline in CMOS Technology and Its Application to Filter Design
作者: 卓宏達
Hung-Ta Tso
郭建男
Chien-Nan Kuo
電子研究所
關鍵字: 慢波係數;共平面帶線;濾波器;CMOS;slow-wave;coplanar stripline;filter
公開日期: 2003
摘要: 本文提出一種適用於標準CMOS製程的新式傳輸線結構─高慢波係數共平面帶線,並將其運用在濾波器之設計。 本設計藉由同時增加傳輸線單位長度電感值及單位長度電容值,可在不改變傳輸線特性阻抗下,大幅降低訊號傳輸之相位速度,亦即大幅降低波長,可縮短70%以上傳輸線長度,亦即減少佔用晶片面積。此外,波長的縮短,亦使得單位波長之損耗大幅降,而使得本設計之傳輸線可用來實現小面積、高品質之電路。 此新式傳輸線為一週期性結構,藉由調整週期結構單元,可改變傳輸線截止頻率,故傳輸線本身即可用來設計低通濾波器。此外,本文利用此新式傳輸線設計一40GHz電容耦合共振帶通濾波器,特點在小面積、小基板損耗、及適用於標準CMOS製程,其佔用面積僅有72*400um2,最小介入損耗(Insertion Loss)為1.4dB,和目前所發表之濾波器比較面積大幅縮小,品質亦顯著提升,更因不需任何後製程而節省了製造成本。
This thesis presents a novel transmission line─ high slow-wave-factor coplanar stripline (HS-CPS) and exploits the new structure to filter applications. In the HS-CPS structure, the distributive inductance and the distributive capacitance per unit length are enhanced simultaneously and consequently the slow-wave characteristic can be increased significantly, while the characteristic impedance can be remained the same. The wavelength reduction of above 70% in the HS-CPS indicates the above 70% occupied area can be saved as compared with the conventional coplanar stripline. In addition, the total attenuation decreases as the length is reduced. The HS-CPS consists of several identical cells, and the cell length determines the cutoff frequency. Therefore, a lowpass filter can be realized simply utilizing the HS-CPS itself. For further application, a 40GHz capacitive coupled one-resonator bandpass filter has been designed and fabricated utilizing the HS-CPS. This bandpass filter features in small size, low substrate loss, and suiting for standard CMOS technology. The occupied area and minimum insertion loss are 72*400um2 and 1.4dB respectively. As compared with the other presented on-chip filters, it is extremely a cheap, miniature, and high-performance solution.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009111548
http://hdl.handle.net/11536/43113
顯示於類別:畢業論文


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