Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 黃士庭 | en_US |
dc.contributor.author | Huang, Shih-Ting | en_US |
dc.contributor.author | 張立平 | en_US |
dc.contributor.author | Chang, Li-Ping | en_US |
dc.date.accessioned | 2014-12-12T01:33:55Z | - |
dc.date.available | 2014-12-12T01:33:55Z | - |
dc.date.issued | 2009 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT079655528 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/43331 | - |
dc.description.abstract | SSD是使用NAND Flash Memory來當作儲存元件,它具有抗震、讀取速度快等特性。SSD為了加快它讀寫的速度,都會採用multi-channel的架構,而SSD的容量逐漸增加,內部的flash chips也越來越多,使得一個request的size沒有辦法讓所有的flash chips工作,造成有些chips處於idle狀態。Device一次只能接受一個request讀取,而且OS對於sequential read access都會分為好幾個requests下給device,所以我們提出一個prefetch的方法,用來預測sequential read access,希望把這些sequential read requests連接起來,這麼一來可以加速SSD處理sequential read access的速度。然後我們還在不同的硬體架構下,觀察prefetch所造成的影響。最後實驗結果顯示,我們的prefetch方法在8-channel的SSD以及每個channel裡有4個flash chips的架構下,可以改善約22.5%的效能。 | zh_TW |
dc.description.abstract | The storage component of SSD is NAND flash memory, it has shock resistance and high speed of read operation. SSD uses multi-channel architecture for increasing speed of read/write operation. Therefore the storage size of SSD and flash chips in it is increasing such that a request does not cause all chips to work, and some chips are idle. A device can service up to one request at a time, and OS separates the sequential read access to many requests to command the device. We proposed a prefetch policy for predicting sequential read access, and hoped to connect the sequential read requests. By this way it could speed up the progress of sequential read access on SSD. Then we also observe the effect of prefetch on different hardware architectures. Finally, our prefetch policy used on the SSD architecture with 8-channel and four flash chips in each channel can improve about 22.5%. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 固態硬碟 | zh_TW |
dc.subject | 預先快取 | zh_TW |
dc.subject | 多通道架構 | zh_TW |
dc.subject | NAND快閃記憶體 | zh_TW |
dc.subject | SSD | en_US |
dc.subject | prefetch | en_US |
dc.subject | multi-channel architecture | en_US |
dc.subject | NAND flash memory | en_US |
dc.title | 適用於多通道固態硬碟的prefetch方法 | zh_TW |
dc.title | adaptive prefetch for multi-channel architecture SSD | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 資訊科學與工程研究所 | zh_TW |
Appears in Collections: | Thesis |
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