藉由重新指定暫存器為混合指令集處理器之程式碼減量

Abstract

由於嵌入式系統缺乏記憶體，所以程式碼大小成為一個重要的研究議題。基於這個理由，一些精簡指令集處理器，例如：ARM、MIPS和ANDES都提出混合長度的指令集架構。此指令集架構支援一般標準長度的指令集，還有一個長度較小的指令集。若一個32位元指令能夠被轉換成對應的16位元指令，則程式碼大小即能得到縮減。但是16位元指令的暫存器欄位通常只有3位元長度，因此16位元指令在暫存器的使用上有所限制。相反地，32位元指令其暫存器欄位通常有4到5個位元長度，所以32位元指令可以使用所有的暫存器。因而當32位元指令要轉換成對應的16位元指令時，可能需要重新指定暫存器才能讓轉換順利執行。指定暫存器通常以下列兩種方式執行：(1)程式碼產生器指定適當的暫存器並試著產生16位元指令；當無法產生16位元指令時，編譯器則會產生32位元指令。(2)編譯器產生出全部為32位元的指令，之後再利用一個額外的步驟去嘗試重新指定暫存器來讓32位元指令轉換為對應的16位元指令。我們基於上述第二種方式，提出了兩個快速重新指定暫存器的方法。單純只有轉換而沒有執行我們提出之重新指定暫存器的方法，程式碼大小平均有百分之二十七的縮減。而我們的實驗結果顯示在相同的程式底下程式碼大小平均有百分之二十八的縮減。

Due to the limited memory in embedded systems, code size becomes an important issue. For this reason, many RISC processors, such as ARM, MIPS, and ANDES, etc., provide a mixed-width instruction set architecture (ISA). This ISA supports a normal-width instruction set (usually 32-bit) and a short-width instruction set (usually 16-bit). Code size will be reduced if some 32-bit instructions are replaced with 16-bit equivalents. There is a restriction on the registers that can be used by 16-bit instructions because the register field in a 16-bit instruction is usually 3 bits wide. In contrast, in a 32-bit instruction, the register field is usually 4 or 5 bits wide. All registers can be used in 32-bit instructions. Therefore, replacing a 32-bit instruction with the 16-bit equivalent may need to re-assign the registers. Register assignment can be performed in two ways: (1) the code generator will attempt to generate 16-bit instructions and assign appropriate registers to the instructions. When it is not possible to generate 16-bit instructions, the compiler will generate 32-bit instructions instead; (2) the compiler will generate purely 32-bit instructions first. A later pass will attempt to reassign the registers so that as many 32-bit instructions can be converted to 16-bit equivalents as possible. We propose two fast methods based on the second approach. We will call our method register re-assignment. We implemented our method in the LLVM static compiler. The results demonstrate that the code size reduction is 28% with our methods. In contrast, a straightforward translation without register reassignment achieves code reduction of 27% on the same benchmarks.