鎳金屬誘發側向結晶複晶矽薄膜電晶體－界面狀態與低溫複晶矽薄膜電晶體特性之研究

Abstract

鎳金屬誘發側向結晶複晶矽薄膜電晶體 －界面狀態與低溫複晶矽薄膜電晶體特性之研究

學生:趙育誠 指導教授:吳耀銓 博士

國立交通大學工學院半導體材料與製程設備學程

摘要

本論文主要研究鎳金屬誘發側向結晶複晶矽的結構特性，並以固相結晶法比較兩種不同機制的低溫結晶製程製作的複晶矽薄膜，觀察其結晶溫度、結晶特性及晶粒尺寸等。接著利用鎳金屬誘發側向結晶及固相結晶兩種方法製作的薄膜電晶體，除了比較出薄膜電晶體的電性表現受到複晶矽結構極大的影響，此外，當主動區上方預先沉積氧化矽再進行結晶製程對兩種不同結晶機制的薄膜電晶體，在電性的表現上將呈現不同的效應。 首先，我們針對鎳金屬誘發側向結晶及固相結晶複晶矽作微結構的探討。除了觀察到以鎳金屬誘發側向結晶複晶矽擁有較大的晶粒尺寸，當我們將製程溫度由550℃降至500℃時，晶粒尺寸有增加的趨勢，這可能的原因是Ni在較低的溫度下擴散速率較慢，造成前端的NiSi2核密度較低，在誘發結晶的過程中，NILC晶粒較不會受到鄰近的NILC晶粒限制而抑制其成長的空間。 接著，本研究比較了界面狀態對鎳金屬誘發側向結晶及固相結晶複晶矽薄膜電晶體的影響。我們以上述兩種不同結晶機制而相同的薄膜電晶體結構探討界面狀態的影響。當我們在非晶矽上方覆蓋一層氧化層時，元件特性竟出奇的差，且不同結晶製程的元件特性幾乎相同，這可能是由於非晶矽本身即含有大量的缺陷，當非晶矽在進行低溫結晶製程時，由低密度的非晶矽薄膜重新排列成為密度較高的複晶矽薄膜後，大量的缺陷集中在Oxide/Si界面處，造成Oxide/Si界面處形成大量的捕陷位置，這種位於界面處的捕陷密度產生的電荷會隨著元件的操作，所帶的電性也會不同，因此降低了主要載子遷移率，並使的元件開關能力變差，造成臨界電壓漂移，次臨界斜率增加。但經過NH3電漿鈍化後，元件大部分特性均獲得提升。以固相結晶法製作的SPC TFT(H)與CO-SPC TFT(H)經電漿鈍化後的元件特性幾乎相同，而CO-NILC TFT(H)的元件特性卻依舊不比NILC TFT(H)，這可能是因為Ni原子或NiSi2容易被trap在Oxide/Si界面，在界面處聚積大量的帶電荷金屬離子，於元件操作時捕捉主要載子而降低元件特性，其中包括電子遷移率、臨界電壓及開關電流比。 最後，我們同時製作了第二章節介紹的CO-NILC及CO-SPC結構，嘗試以半導體製程中常見的表面清洗化學溶液，即鹽酸(HCl37％)與硫酸加雙氧水(H2SO495％ + H2O232％)3比1的比例，針對兩種不同結晶製程做表面處理並製作薄膜電晶體比較元件特性。實驗結果發現，當我們將CO-NILC上方覆蓋的氧化矽移除後在以鹽酸進行表面處理所製作的HCL-NILC TFT，由於移除了trap在Oxide/Si界面的Ni原子或NiSi2，在電性上獲得大幅提升，其中包括電子遷移率提升了172％，開關電流比提升了387％，而對HCL-SPC TFT亦有些微提升，但尚在標準差範圍內，影響不大。

Ni-Metal Induced Lateral Crystallization of Polycrystalline Silicon Thin Film Transistors － Interface state and LTPS TFTs Device Performance

Student：Yu-Cheng Chao Advisor：Dr. YewChung Sermon Wu

Institute of Semiconductor Material and Process Equipment College of Engineering National Chiao Tung University

Abstract

In this thesis, Structural characteristics of polycrystalline silicon (poly-Si) made by Ni-metal induced lateral crystallization (NILC) has been studied. Two kinds of poly-Si thin film were fabricated by different mechanisms of low temperature crystallization process, NILC and SPC and further explore the effect of the two mechanisms on the microstructure and the crystallization temperature of poly-Si. It was found that the electrical performance of the polycrystalline silicon thin-film transistors which were made by NILC and SPC is greatly affected by the microstructure of the poly-Si. Moreover, deposition of the silicon oxide on the active region before crystallization process may lead to different results on the electrical performance of the two kinds of polycrystalline silicon thin-film transistors . Initially, the microstructure of poly-Si is investigated. It has been observed that the poly-Si fabricated by NILC has the larger crystal grain size and the grain size increased as the processing temperature decreased from 550℃ to 500℃. The reason is thought to be that under the lower temperature, the diffusion rate of Ni is decreased and hence the nuclei density of NiSi2 in the front end is reduced. During the induced crystallize process, the NILC grains may not be restrained by the nearby grains and therefore have more space to grow into larger grains. Furthermore, we discuss the effect of interface state upon the NILC and SPC polycrystalline silicon thin-film transistors by considering the TFTs with the same structure but made by the two kinds of mechanisms. It was found that when an oxide layer was covered above the amorphous silicon, the electrical characteristics of the two devices are extremely the same. It is possibly due to the large amount of defects within the amorphous silicon. During the low temperature crystallization process, the atoms of the low density amorphous silicon thin film rearrange and form the high density polycrystalline silicon thin film. Thus a large number of defects gather at the oxide/Si interface and cause a lot of trap site. The electric potential of the charges induced by the trap state density of the interface will change as the operation of the device. As the result, it was found that the field-effect mobility and on/off ability were decreased, the threshold voltage shift and flat subthreshold swing. However, after passivated by the NH3 plasma, most the device performance are impoved. The device performance of SPC TFT and CO-SPC TFT are almost identical, but the electrical characteristics of the CO-NILC TFT(H) is still worse than NILC TFT(H). The reason is thought to be that the Ni atoms or NiSi2 are easily trapped at the Oxide/Si interface and accumulated a large amount of charged metallic ions, which capture the major carriers during the operation of the device and reduce the performance such as the mobility of electrons, threshold voltage and the on/off current ratio. Finally , we fabricate CO-NILC and CO-SPC structures that introduced in chapter two, use the HCl37％ solution and H2SO495％ + H2O232％ (3：1) solution to do the surface treatment and then further compare the characteristics of the TFT devices. The results are shown that the HCl-NILC TFT which was made by removing the NiSi2 or Nickel atom above the Oxide/Si interface and proceeding with HCl surface treatment has a great enhancement on the electrical characteristics. The mobility of the electrons is 172% increased, the ON/OFF current ratio is 387% improved. The performance of the HCl-SPC TFT is also slightly promoted, but in the standard deviation scope.