Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 楊子明 | en_US |
dc.contributor.author | 吳耀銓 | en_US |
dc.date.accessioned | 2014-12-12T01:36:13Z | - |
dc.date.available | 2014-12-12T01:36:13Z | - |
dc.date.issued | 2008 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT079675527 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/44003 | - |
dc.description.abstract | 在本篇論文中,主要的研究是利用鎳捉聚(Ni-Gettering)技術製備高效能奈米線(nanowire , NW)通道金屬誘發低溫複晶矽薄膜電晶體,並測量了它的特性。 首先,我們將利用鎳金屬誘發側向結晶(Nickel-Induced Lateral Crystallization , NILC)成長機制的低溫複晶矽(Low-Temperature Polycrystalline Silicon , LTPS)技術,來製造具有多晶矽奈米線通道的薄膜電晶體,且與固相結晶法(Solid Phase Crystallization , SPC)的元件相比較;另外,我們將利用一個簡易及低成本的方法去製作奈米線通道。其製備之特點為利用一般製作MOSFET元件的側壁邊襯(sidewall spacer)之概念,以底閘極(bottom gate)薄膜電晶體結構在定義汲極(source)和源極(drain)之同時,可自我對準形成奈米線通道,此多晶矽邊襯奈米線通道(poly-Si sidewall spacer nanowire channel)之寬度(width)可以控制至70nm,故可巧妙地將之作為多晶矽奈米線通道。 此外,為了解決對於鎳金屬誘發複晶矽薄膜中非常重要的鎳金屬殘留問題,因而發展出有效的方法來降低鎳金屬誘發複晶矽薄膜中的鎳金屬殘留,本論文中將提出一種簡易及有效的方法去完成鎳捉聚技術。 最後,為了更進一歩改善元件特性,我們對元件做了氨(NH3)電漿處理,我們發現氨電漿處理能有效改善元件特性,例如:鈍化缺陷、降低漏電流、提升載子遷移率、增強開關電流比以及較好的次臨界擺幅等。 | zh_TW |
dc.description.abstract | In this thesis, fabrication and characterization of high performance NILC LTPS nanowire TFTs using Ni-gettering has been studied. Initially, we employ LTPS NILC technology to fabricate TFTs with poly-Si nanowire channels. It’s a simple method and low-cost process to manufacture the nanowire channels. The feature of process was the method of forming sidewall spacer of MOSFET. Simultaneously, we define source/drain and self-alignment form the poly-Si sidewall spacer nanowire channels for the bottom-gate TFT. Thus, we can simply control the width of sidewall spacer nanowire channel around 70 nm by etching condition. Moreover, due to NILC Poly-Si, residual Ni trapped by the grain boundaries and defects leads to introduce deep level states and results in degradation of the device performance. Therefore, in order to solve this issue, we develop a simple and effective gettering method to reduce the Ni-metal impurity contamination of the NILC poly-Si. Finally, we execute the NH3 plasma treatment to further improve the device performance. Through this way, we reveal that the NH3 plasma treatment can effectively improve the device performance, such as passivate the defects, reduce leakage current, enhance carrier mobility, increase on/off current ratio, and better subthreshold swing, etc. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 薄膜電晶體 | zh_TW |
dc.subject | 金屬誘發結晶 | zh_TW |
dc.subject | 金屬誘發側向結晶 | zh_TW |
dc.subject | 奈米線 | zh_TW |
dc.subject | 捉聚 | zh_TW |
dc.subject | 氨電漿鈍化 | zh_TW |
dc.subject | 低溫複晶矽 | zh_TW |
dc.subject | 側壁邊襯 | zh_TW |
dc.subject | 固相結晶 | zh_TW |
dc.subject | Thin Film Transistor (TFT) | en_US |
dc.subject | Metal Induced Crystallization (MIC) | en_US |
dc.subject | Metal Induced Lateral Crystallization (MILC) | en_US |
dc.subject | Nanowire | en_US |
dc.subject | Gettering | en_US |
dc.subject | NH3 Plasma Passivation | en_US |
dc.subject | Low-Temperature Polycrystalline Silicon (LTPS) | en_US |
dc.subject | Sidewall Spacer | en_US |
dc.subject | Solid Phase Crystallization (SPC) | en_US |
dc.title | 利用鎳捉聚技術製備高效能奈米線通道金屬誘發低溫複晶矽薄膜電晶體及其特性分析 | zh_TW |
dc.title | Fabrication and Characterization of High Performance NILC LTPS Nanowire TFTs using Ni-Gettering | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 工學院半導體材料與製程設備學程 | zh_TW |
Appears in Collections: | Thesis |
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