具真空間隙之T型閘極低溫多晶矽薄膜電晶體之研究

Abstract

多晶矽薄膜電晶體因擁有較高的載子遷移率而被廣泛的應用在主動矩陣式液晶顯示器的開關元件上。然而，因汲極端的高電場所造成高的漏電流及元件的不穩定性阻礙了多晶矽薄膜電晶體在高性能電路上的應用。為了克服在汲極端所產生的高電場，有很多降低汲極端電場的結構已經被提出，但這些結構卻增加了製程的困難性並使元件的製作成本大幅增加。 在本論文中，我們提出了一個製作簡單並能有效降低汲極端電場的T型閘極結構。這個T型閘極結構不需要額外的光罩或是離子佈植，只需要一個側向蝕刻製程就能實現。特別的是，我們在T型閘極的下方能臨場嵌入真空間隙，藉此有效的減低汲極端的電場。 本實驗先對其電場的變化進行模擬，隨之對此結構多種元件特性做探討，包含了傳輸特性、輸出特性、對稱性及可靠度方面的分析。實驗結果顯示，此T型閘極結構能十分有效的抑制漏電流的產生並提升元件開關電流比，在可靠度方面也明顯的優於傳統的元件。

Polycrystalline silicon thin film transistors (poly-Si TFTs) has been widely used as the pixel switching elements in active matrix addressed flat panel display due to their higher carrier mobility compared with a-Si TFTs. However, the large off-state leakage current and device instability caused by the high electric field near the drain junction impede the usage of poly-Si in high performance circuit applications. In order to alleviate the high electric field near the drain junction, lots drain-field-relief structures have been proposed. However, most of them not only require complicated fabrication process but also increase the manufacturing cost. In this thesis, we proposed a high drain-field-relief efficiency T-shaped gate (T-Gate) poly-Si TFTs by using a simple fabrication sequence. Specifically, the T-Gate structure does not need additional photolithography step nor ion implantation step, it only requires a simple side-etching process by wet-etching method. Besides, vacuum gaps served as the drain-field-relief element were in-situ embedded under the T-Gate electrode during the SiH4-based passivation process. The simulations were carried out to evaluate the electric field effect on the T-Gate structure. Following that, the electrical characteristics including transfer characteristics, output characteristics, breakdown characteristics, symmetry characteristics and reliability issues were all investigated. Results of this study showed that the T-Gate TFTs exhibit much lower off-state leakage current, good on/off current ratio, better kink-effect immunity and better reliabilities.