完整後設資料紀錄
DC 欄位語言
dc.contributor.author黃瑄勻en_US
dc.contributor.authorHsuan-Yun Huangen_US
dc.contributor.author林鴻志en_US
dc.contributor.author黃調元en_US
dc.contributor.authorHorng-Chih Linen_US
dc.contributor.authorTiao-Yuan Huangen_US
dc.date.accessioned2014-12-12T01:36:57Z-
dc.date.available2014-12-12T01:36:57Z-
dc.date.issued2009en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079694506en_US
dc.identifier.urihttp://hdl.handle.net/11536/44166-
dc.description.abstract在本篇論文中,我們發展一種新的製程方法,製作與分析多閘極結構的多晶矽奈米線SONOS元件。這些方法無須借助先進與昂貴的製程設備,即能形成極小尺吋的奈米線;同時經由製程步驟上的修改,共有三種不同閘極組態的元件,分別命名為SG、ΩG與GAA,可以完成與比較,有助於我們探討多閘極對於奈米線的基本電性。我們的實驗數據顯示,在三種不同閘極組態的元件當中,由於奈米線具有較佳的閘極控制能力,使得GAA展現出更好的特性,因此具有較大的導通電流、抑制短通道效應、較好的次臨界幅擺(subthreshold swing)。 此外,在SONOS特性上,相較於其他兩種元件,近圓形的GAA奈米線通道展現出更好的寫入和抹除特性;在可靠度議題方面,GAA奈米線也擁有最佳的的電荷儲存能力(retention)和耐操度(endurance),它可以承受超過10000次的重複寫入/抹除,並且在室溫下十年後仍可維持大於0.5V的記憶窗(memory window)。zh_TW
dc.description.abstractIn this thesis, poly-Si nanowire (NW) SONOS devices with various multiple-gated (MG) configurations were fabricated by utilizing a simple and low-cost technique. With a slight modification in the fabrication procedure, three different types of MG configuration, namely, SG, ΩG, and gate-all-around (GAA), were realized in the fabricated devices. It thus allows us to unambiguously investigate the impacts of different MG configurations on the basic electrical characteristics. The experimental results show that much improved device characteristics with GAA devices are achieved as compared with the other types of devices, owing to the superior gate controllability over NW channel with the GAA structure, which results in a higher ON-current, suppressed short channel effects, and steeper sub-threshold swing (SS) for NWs. For SONOS characterization, we confirmed that the round-shape GAA NW channel exhibits the best performance in P/E characteristics among all splits. For reliability issues, the GAA devices also exhibit good data retention and endurance characteristics. The memory window can be larger than 0.5 V after 10 years for a device after subjecting to 104 times of P/E cycles at room temperature.en_US
dc.language.isoen_USen_US
dc.subject多晶矽奈米線SONOS元件zh_TW
dc.subjectPoly-Si Nanowire SONOS Devicesen_US
dc.title新式多晶矽奈米線SONOS元件製作與特性分析zh_TW
dc.titleFabrication and Characterization of Novel Poly-Si Nanowire SONOS Devicesen_US
dc.typeThesisen_US
dc.contributor.department電機學院微電子奈米科技產業專班zh_TW
顯示於類別:畢業論文


文件中的檔案:

  1. 450601.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。