考慮差分對長度匹配的同時跳脫繞線

Abstract

跳脫繞線問題在數位印刷電路板的設計上扮演著重要的角色，且被廣泛的研究。不論在工業界或學術論文上，數位印刷電路板上的同時跳脫繞線與差分對跳脫繞線等問題已經有所進展，然而，考慮差分對長度匹配的同時跳脫繞線仍然是個待解決的問題。本文中，我們基於B-escape 繞線演算法與最小成本中點的概念，實現了考慮差分對長度匹配的同時跳脫繞線。實驗結果顯示我們的做法能比原本的B-escape演算法在較少的時間內，有效且快速的達成差分對的同時跳脫繞線並做到長度匹配，藉此減少電路中的差分對延遲差。

In PCB(printed circuit board) design, the escape routing problem is considered an important part and has been widely studied in literature. There are industrial tools and some studies that work on simultaneous escape routing and escape routing of differentials pairs on dense circuit boards, however, to route differential pairs simultaneously considering length-matching is still an on-going research problem. In this thesis, based on the B-escape routing algorithm and the idea of min-cost median point used in differential pair length-matching strategy, we have implemented a work that achieves simultaneous escape routing considering length matching of differential pairs. Experimental results show that our approach can efficiently and effectively obtain length-matching of differential pairs on simultaneous escape routing to reduce differential-pair skews with less running time than original B-escape router.