原子層沉積氧化鋁閘極介電層之砷化鎵通道元件電性研究

Abstract

在此篇文獻中，我們已經最佳化表面處理使得砷化鎵的表面費米能階可成功到達反轉區，也將砷化鎵能隙中間的Dit值降低至2E12cm-2V-1。首先，我們先探討利用原子層沉積氧化鋁做為閘極氧化層的電容電性，使用Berlund積分公式求出半導體表面費米能階與閘極電壓關係，並且比較不同Dit在砷化鎵能隙中分佈的萃取方式。其次，我們探討在沉積氧化鋁之前，利用三甲基鋁，還原基板表面的氧化物，其對砷化鎵電容特性的影響。雖然在電容的電性以及XPS分析上沒有發現明顯的改善，但是經過TEM照片的輔助，計算出閘極氧化層的介電值與等效氧化層厚度有明顯的改進。接著，我們探討不同表面晶向(100)與(111)A的基板的電容特性。發現利用基板晶向為(111)A的電容特性具有很大的改進，可以使表面費米能階成功到達反轉區，也將砷化鎵能隙中間的Dit值降低，我們推測改善是源自於基板表面結構不同所致。針對電容研究的情形，我們利用已經最佳化過後的表面處理去製作出砷化鎵場效應電晶體。 最後我們成功在半絕緣的基板上製作出原子層沉積氧化鋁高介電層之增強式砷化鎵N型場效電晶體。砷化鎵場效電晶體( 寬度/長度 = 100 μm/50 μm )的載子遷移率峰值為15 cm2V-1s-1，而電晶體( 寬度/長度 = 100 μm/5 μm )的電流開關比為4.12E3。雖然成功製作出電晶體，不過元件特性尚未預期的好，我們推測是由於電晶體的源極與汲極的活化步驟的條件沒掌控好所導致。此外，我們也成功製作出通道為砷化銦鎵而源極與汲極為磊晶鍺異質接面的金半場效電晶體，並探討其元件特性。

In this thesis, we demonstrated that the Fermi level (EF) of GaAs on the surface could be adjusted to the level of the inversion mode via optimizing the surface treatment. With the optimized treatment, the interface state density (Dit) in the middle of energy bandgap of GaAs could be significantly eliminated to a value of 2E12cm-2V-1. At first, we studied the electrical characteristics on GaAs MOS capacitor with Al2O3 gate dielectric formed by atomic-layer-deposition (ALD). We not only utilized Berglund’s integration to obtain the relation between surface potential and gate voltage but also compared the Dit distribution within energy bandgap by the different extraction methods. Next, we studied the reduction of native oxides on GaAs substrates by trimethylaluminum (TMA) pretreatment before ALD of Al2O3 and examined the impact of the electrical characteristics on GaAs MOS capacitors. Although we did not observe anything different on electrical characteristics and XPS analysis, we found the improvement in the value of k and effective oxide thickness after calculation with the TEM image. Then, we studied the electrical characteristics on GaAs MOS capacitors with the different surface orientation of substrates. There was improvement on GaAs MOS capacitors with (111)A surface orientation. The EF of surface on GaAs could reach inversion region and the value of Dit in the middle of energy bandgap was decreased. We presumed that improvement was caused by the different structure of surface on substrate. Finally, we fabricated E-mode GaAs n-MOSFET on semi-insulator substrate. The electronic mobility we extracted was 15 cm2V-1S-1 and the on/off ratio was 4.12E3; the lower mobility and poor on/off ratio were due to the unsuccessful S/D activation. In addition, we also fabricated InGaAs channel MESFET with Ge S/D and studied electrical characteristics.