具有負載適應性之抑制癲癇發作電流刺激器設計

Abstract

結合醫學與微電子學，電流刺激器已被視為嶄新的醫療技術，可應用於功能性電刺激 (Functional electrical stimulation) 與治療性電刺激 (Therapeutic electrical stimulation)。設計的首要考量包含安全性、可靠度與功率消耗。由於電極與較高之生物等效阻值，電流刺激器必須以高電壓運作，因此本論文採用高壓元件 (0.35-μm 3.3-V/24-V BCD process) 實作電流刺激器晶片。 本文所提出之第一種電流刺激器具備電壓回授適應器，可在 20k 至 200k 歐姆之阻值變化範圍內穩定地輸出 30 微安培的刺激電流，並採用串連阻隔電容提升安全性，且使用可調整之操作電壓以節省功率消耗，平均功率消耗為 0.24 至 0.56 毫瓦。該設計之原型已與閉迴路癲癇偵測與控制系統結合，並經由透過動物實驗驗證其與系統的共容性。 為了與其他採用單一電壓之控制系統各子電路結合，本文所提出之第二種電流刺激器具備電荷幫浦電路 (Charge pump system)，用以產生電流刺激器所需之高電壓。針對阻值適應性，電路具備電流回授適應控制設計，偵測刺激電流在阻值改變下之變動，並即時透過電荷幫浦改變操作電壓，可輸出雙極性之 40 微安培電流，該刺激器之平均消耗功率為 1.1 至 1.6 毫瓦，且只使用單一電壓源(3.3 伏特)。

The novel design with the adaptability prevents from unexpected stimulus current was proposed for medical safety, since the safety is the prime concern for human use. The prototype of the stimulus driver circuit with voltage-mode adaptor for micro-stimulator used in implantable device is presented in the first design of this work. For epilepsy control, the target of the driver is to generate an output stimulus current of 30 μA, as the tissue impedance varies within 20~200 kΩ. The driver, composed of the output stage, current sensor, and control block, has been integrated in a single chip. The averaged power consumption of the driver is 0.24~0.56 mW under 800-Hz stimulation rate. Fabricated in a 0.35-μm 3.3-V/24-V bipolar CMOS DMOS (BCD) process and integrated into closed-loop epileptic seizure monitoring and controlling system, the performances of this first design have been confirmed by experiment results in the Long-Evans rats with spontaneous absence seizures. The second design of this work adopts charge pump circuit with consideration of integrity of whole therapeutic system with other sub-system together. The second design, composed of the output stage, current sensor, control block, and charge pump circuit, has been integrated in a single chip. Utilized two-lead electrode set and current-mode adaptor, the stimulus driver is able to generate bi-phase stimulus current and to regulate suitable operating voltage. The averaged power consumption of the second design is 1.1~1.6 mW with a single power supply of 3.3 V (VDD).