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dc.contributor.author陳家忠en_US
dc.contributor.authorC. C. Chenen_US
dc.contributor.author荊鳳德en_US
dc.contributor.authorAlbert Chinen_US
dc.date.accessioned2014-12-12T01:37:57Z-
dc.date.available2014-12-12T01:37:57Z-
dc.date.issued2005en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009111820en_US
dc.identifier.urihttp://hdl.handle.net/11536/44434-
dc.description.abstract隨著行動無線通訊系統需求日益增加,對高性能、低成本、低功率、以及小體積之射頻/微波電路之需要更顯得迫切。由於現今積體化之CMOS晶片不斷地微縮化,使得主動元件可震盪頻率不斷地提高,若再能結合高性能化的高頻被動元件,會使得CMOS矽製程儼然成為可應用於射頻/微波領域的半導體技術之一,故改善高頻被動元件特性為其研究之重點。 然而,CMOS製程所使用之標準低阻值矽基板 (conductivity ~10 □omhic-cm) 而言,其上的傳輸線以及被動元件皆有著相當高的訊號損失。這些損失不但造成元件本身特性變差,更會破壞CMOS射頻/微波電路的效能。這些低性能的被動元件,正是目前CMOS射頻/微波電路最大的致命傷之一。因此,如何克服此問題,對未來CMOS射頻/微波電路的研究與發展將有著關鍵性的影響。 本論文中首先採用高阻值的矽基板,來降低其上元件之訊號在基板中的損耗,進而提升射頻/微波性能及改善CMOS射頻/微波電路系統之特性,並能使用3D之技術能來整合被動元件在同一晶片中,也是最終之目的。此外,也針對在多層介電板中之高頻被動元件,利用半導體之製程技術來改善其高頻特性,因為現今高頻被動元件都仍外掛於晶片外中在印刷電路板中,改善其元件效能,也是本篇聚焦之貢獻。 本論文以射頻/微波電路中最常見之收發器 (transceiver) 電路出發,架構分別為:高頻被動元件在矽基板之研究; 高頻被動元件在多層介電板之研究;傳輸線在晶片中損耗的影響; 及結合3D技術整合微波被動元件四方面來探討。包括:共平面 (CoPlanar Waveguide, CPW) 傳輸線、 微波帶通 (band-pass); 分散式 (distributed) 濾波器,耦合器(Couplers)元件等等;最後亦探討了晶片內之傳輸和整合被動元件於晶片系統中。研究內容主要在於基板阻值對元件特性的影響,包括功率耗損、頻寬的延伸、能量的傳輸,和低耗損的共振。最後,仍朝著結合這些被動元件於收發器電路中,作出高性能高度整合之CMOS收發器為目標來邁進。zh_TW
dc.description.abstractAs mobile microwave communication development increases, high performance, low-cost, low power, small size RF integrated circuits (RFICs) are required. This is because the maximum oscillation frequency increases as down-scaling CMOS technology (for 90 nm RF CMOS). However, transmission lines and passive circuit components on standard low-resistivity silicon substrates such as those used in CMOS processing have high power loss, which degrade the characteristics of devices and further damage the performance of CMOS RF/Microwave circuits. To overcome this problem, we have developed a method of high resisvity silicon substrate technology, which is capable of converting the standard low-resistivity Si to high-resistivity for large substrate loss improvement with full VLSI technology process compatibility. In this work, we have applied the high-resistivity Silicon substrate to almost all of the passive components used in a common transceiver on Si, including: coplanar waveguide (CPW) transmission lines, resonators, microwave band-pass distributed filters and couplers. In addition, the standard VLSI process is used to improve RF characteristics on high frequency printed circuit board (PCB) passive devices. The superior RF characteristics of extending bandwidth, lower insertion loss, and high coupling correspond with advanced wireless system demands. Hence, we have successfully demonstrated the excellent characteristics of RF passive devices on both silicon substrate and printed circuit board by decreasing power and coupling losses. Moreover, with the development of three dimensional technology, combing with interconnects and high resistivity substrate, these passive devices on standard VLSI process have been embedded into ICs. These device characteristics on silicon or PCB substrates, such as measured power loss, bandwidths, return loss, and insertion loss and coupling effect have presented in whole chapters. These enhanced RF performance methods on RF passive devices can contribute to applications in the advanced wireless systems.en_US
dc.language.isoen_USen_US
dc.subject高頻被動元件zh_TW
dc.subject矽基板zh_TW
dc.subject多層介電質基板zh_TW
dc.subjectHigh Frequency Passive Devicesen_US
dc.subjectSilicon substrateen_US
dc.subjectPCBen_US
dc.title高頻被動元件在矽基板和多層介電質基板之模型與特性zh_TW
dc.titleThe Characteristics and Models of High Frequency Passive Devices on Silicon and PCB Substratesen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
Appears in Collections:Thesis


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