一種新式降頻濾波器設計以及補償

Abstract

在這篇論文中，我們提出了一種適合ΣΔ類比數位轉換器的新型降頻濾波器。提出的降頻濾波器架構包含了兩個子濾波器。第一個子濾波器是改良式串聯積分梳狀(CIC)濾波器，相較於傳統CIC濾波器可以較低的硬體複雜度達到較好的止帶(stopband)衰減。第二個子濾波器是補償選擇(compensative selection)濾波器，不只可以補償類比濾波器以及前級濾波器的通帶誤差(passband droop)，也可以過濾頻譜以達到power spectrum mask的規格。論文中有設計範例以說明所提出降頻濾波器的優點。

In this thesis, we propose a novel design of decimation filter for ΣΔ ADC. The architecture of the proposed decimation filter includes two subfilters. The first subfilter is a modified CIC filter which can achieve better stopband rejection with lower hardware complexity than conventional CIC filter. The second subfilter is a compensative selection filter that not only can compensate the passband droop induced by the analog filter and the subfilters in previous stages, but also can further sharpen the frequency response to satisfy the requirements of power spectrum mask. Design examples are given to demonstrate the advantages of the proposed decimation filter.